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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:18:39 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:18:39 -0700 |
| commit | a19c212757b13e45f481d8612fd38f603250c853 (patch) | |
| tree | cbc0abe8e8a9807fecfe6c432735bac7ac3b3fa8 /src/arch/x86/tlb.hh | |
| parent | cd36c69a4de51d45b82038a012a53cf58f4f3fa2 (diff) | |
| download | gem5-a19c212757b13e45f481d8612fd38f603250c853.tar.xz | |
X86: Work on the x86 tlb.
--HG--
extra : convert_revision : a08a5cb049a6030ba9fd56a89383d56026238dbf
Diffstat (limited to 'src/arch/x86/tlb.hh')
| -rw-r--r-- | src/arch/x86/tlb.hh | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 720b03b98..12739379c 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -108,6 +108,10 @@ namespace X86ISA void demapPage(Addr va); + template<class TlbFault> + Fault translate(RequestPtr &req, ThreadContext *tc, + bool write, bool execute); + public: // Checkpointing virtual void serialize(std::ostream &os); @@ -134,7 +138,6 @@ namespace X86ISA DTB(const Params *p) : TLB(p) { } - Fault translate(RequestPtr &req, ThreadContext *tc, bool write); #if FULL_SYSTEM Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); |