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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-06-19 14:18:25 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-06-19 14:18:25 +0000 |
| commit | 6e286cddfaf6286f96e06c26266070f6fbbd7749 (patch) | |
| tree | f318b62e376304d0b7f353a68794e4da160f5c8e /src/arch/x86/types.hh | |
| parent | 8caef7d25a6a150fa6369234bbdc8c14ef637df8 (diff) | |
| download | gem5-6e286cddfaf6286f96e06c26266070f6fbbd7749.tar.xz | |
Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
Diffstat (limited to 'src/arch/x86/types.hh')
| -rw-r--r-- | src/arch/x86/types.hh | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh index fc9f1d82b..298dff80b 100644 --- a/src/arch/x86/types.hh +++ b/src/arch/x86/types.hh @@ -169,6 +169,8 @@ namespace X86ISA uint8_t opSize; //The effective address size. uint8_t addrSize; + //The effective stack size. + uint8_t stackSize; //Mode information OperatingMode mode; @@ -193,8 +195,6 @@ namespace X86ISA inline static bool operator == (const ExtMachInst &emi1, const ExtMachInst &emi2) { - if(emi1.mode != emi2.mode) - return false; if(emi1.legacy != emi2.legacy) return false; if(emi1.rex != emi2.rex) @@ -215,6 +215,14 @@ namespace X86ISA return false; if(emi1.displacement != emi2.displacement) return false; + if(emi1.mode != emi2.mode) + return false; + if(emi1.opSize != emi2.opSize) + return false; + if(emi1.addrSize != emi2.addrSize) + return false; + if(emi1.stackSize != emi2.stackSize) + return false; return true; } |