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authorGabe Black <gblack@eecs.umich.edu>2007-03-13 16:13:21 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-13 16:13:21 +0000
commitce18d900a17cdda2cc041b51c56e6c84fb155331 (patch)
treed7be0cac19e550c93fc207e749ea80e1cf9a639e /src/arch/x86/types.hh
parent8edc9d79cee3edd6d16a8254a0180aaa242974c7 (diff)
downloadgem5-ce18d900a17cdda2cc041b51c56e6c84fb155331.tar.xz
Replaced makeExtMI with predecode.
Removed the getOpcode function from StaticInst which only made sense for Alpha. Started implementing the x86 predecoder. --HG-- extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
Diffstat (limited to 'src/arch/x86/types.hh')
-rw-r--r--src/arch/x86/types.hh17
1 files changed, 13 insertions, 4 deletions
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh
index 63f65eee5..3f3c1ca0e 100644
--- a/src/arch/x86/types.hh
+++ b/src/arch/x86/types.hh
@@ -62,10 +62,19 @@
namespace X86ISA
{
- //XXX This won't work
- typedef uint32_t MachInst;
- //XXX This won't work either
- typedef uint64_t ExtMachInst;
+ //This really determines how many bytes are passed to the predecoder.
+ typedef uint64_t MachInst;
+ //The intermediate structure the x86 predecoder returns.
+ struct ExtMachInst
+ {
+ //Empty for now...
+ };
+
+ bool operator == (const ExtMachInst &emi1, const ExtMachInst &emi2)
+ {
+ //Since this is empty, it's always equal
+ return true;
+ }
typedef uint64_t IntReg;
//XXX Should this be a 128 bit structure for XMM memory ops?