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authorGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
commit0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch)
tree1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/arch/x86/types.hh
parenteae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff)
downloadgem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/arch/x86/types.hh')
-rw-r--r--src/arch/x86/types.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh
index 6d9f600ff..a604c3efc 100644
--- a/src/arch/x86/types.hh
+++ b/src/arch/x86/types.hh
@@ -51,7 +51,7 @@
namespace X86ISA
{
- //This really determines how many bytes are passed to the predecoder.
+ //This really determines how many bytes are passed to the decoder.
typedef uint64_t MachInst;
enum Prefixes {
@@ -127,7 +127,7 @@ namespace X86ISA
RealMode
};
- //The intermediate structure the x86 predecoder returns.
+ //The intermediate structure used by the x86 decoder.
struct ExtMachInst
{
//Prefixes