diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2008-02-26 23:39:53 -0500 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2008-02-26 23:39:53 -0500 |
commit | 43ecce5fda625e057724d10e087180b02d027ca0 (patch) | |
tree | 2984a0315219c95b6aa6d9f06e4ad026e3090514 /src/arch/x86/utility.cc | |
parent | 98d2ca403e859f289e6d637a2179e62728370d5f (diff) | |
download | gem5-43ecce5fda625e057724d10e087180b02d027ca0.tar.xz |
X86: Put in initial implementation of the local APIC.
--HG--
extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
Diffstat (limited to 'src/arch/x86/utility.cc')
-rw-r--r-- | src/arch/x86/utility.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index f5e87b860..5fe5bf8c3 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -248,6 +248,16 @@ void initCPU(ThreadContext *tc, int cpuId) // TODO Turn on the APIC. This should be handled elsewhere but it isn't // currently being handled at all. + LocalApicBase lApicBase = 0; + lApicBase.base = 0xFEE00000 >> 12; + lApicBase.enable = 1; + lApicBase.bsp = (cpuId == 0); + tc->setMiscReg(MISCREG_APIC_BASE, lApicBase); + + tc->setMiscRegNoEffect(MISCREG_APIC_ID, cpuId << 24); + + tc->setMiscRegNoEffect(MISCREG_APIC_VERSION, (5 << 16) | 0x14); + // TODO Set the SMRAM base address (SMBASE) to 0x00030000 tc->setMiscReg(MISCREG_VM_CR, 0); |