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authorMitch Hayenga <mitch.hayenga@arm.com>2014-09-20 17:18:35 -0400
committerMitch Hayenga <mitch.hayenga@arm.com>2014-09-20 17:18:35 -0400
commite1403fc2af61c224c573c47c77a36f9b1b78e7df (patch)
tree07647bb8697ac256d180bf8de35080eee2a63f3e /src/arch/x86/utility.cc
parent2b0438a11eb6a9640b06da91e8a300d0ac3ad81a (diff)
downloadgem5-e1403fc2af61c224c573c47c77a36f9b1b78e7df.tar.xz
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an optional delay parameter. However this parameter was often ignored. Also, when used, the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were ever specified). This patch removes the delay parameter and 'Events' associated with them across all ISAs and cores. Unused activate logic is also removed.
Diffstat (limited to 'src/arch/x86/utility.cc')
-rw-r--r--src/arch/x86/utility.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc
index fcd52d38a..d58498be2 100644
--- a/src/arch/x86/utility.cc
+++ b/src/arch/x86/utility.cc
@@ -203,12 +203,12 @@ void initCPU(ThreadContext *tc, int cpuId)
void startupCPU(ThreadContext *tc, int cpuId)
{
if (cpuId == 0 || !FullSystem) {
- tc->activate(Cycles(0));
+ tc->activate();
} else {
// This is an application processor (AP). It should be initialized to
// look like only the BIOS POST has run on it and put then put it into
// a halted state.
- tc->suspend(Cycles(0));
+ tc->suspend();
}
}