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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:00:15 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:00:15 -0800 |
| commit | bfc62d1a7035dfdbad405c0ddbd897ea1174360d (patch) | |
| tree | 1fa01d23200823c1e162d28303254b81bccea6f3 /src/arch/x86/utility.cc | |
| parent | 7433032b39828ccff9ad5ed0e3ed95f752fc269a (diff) | |
| download | gem5-bfc62d1a7035dfdbad405c0ddbd897ea1174360d.tar.xz | |
X86: Separate the effective seg base and the "hidden" seg base.
--HG--
extra : convert_revision : 5fcb8d94dbab7a7d6fe797277a5856903c885ad4
Diffstat (limited to 'src/arch/x86/utility.cc')
| -rw-r--r-- | src/arch/x86/utility.cc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index 0153f10e0..69179c1f4 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -118,6 +118,7 @@ void initCPU(ThreadContext *tc, int cpuId) for (int seg = 0; seg != NUM_SEGMENTREGS; seg++) { tc->setMiscReg(MISCREG_SEG_SEL(seg), 0); tc->setMiscReg(MISCREG_SEG_BASE(seg), 0); + tc->setMiscReg(MISCREG_SEG_EFF_BASE(seg), 0); tc->setMiscReg(MISCREG_SEG_LIMIT(seg), 0xffff); tc->setMiscReg(MISCREG_SEG_ATTR(seg), dataAttr); } @@ -130,7 +131,10 @@ void initCPU(ThreadContext *tc, int cpuId) codeAttr.defaultSize = 0; tc->setMiscReg(MISCREG_CS, 0xf000); - tc->setMiscReg(MISCREG_CS_BASE, 0x00000000ffff0000ULL); + tc->setMiscReg(MISCREG_CS_BASE, + 0x00000000ffff0000ULL); + tc->setMiscReg(MISCREG_CS_EFF_BASE, + 0x00000000ffff0000ULL); // This has the base value pre-added. tc->setMiscReg(MISCREG_CS_LIMIT, 0xffffffff); tc->setMiscReg(MISCREG_CS_ATTR, codeAttr); |