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author | Gabe Black <gblack@eecs.umich.edu> | 2010-08-23 16:14:20 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-08-23 16:14:20 -0700 |
commit | 943c1714803bb87d3b05b2516701dfb792996805 (patch) | |
tree | cfefb1ef949355bc237c9b6e37117b9b059e0116 /src/arch/x86/utility.hh | |
parent | 9581562e653f6df810e40c076bc97d50daccf302 (diff) | |
download | gem5-943c1714803bb87d3b05b2516701dfb792996805.tar.xz |
ISA: Get rid of old, unused utility functions cluttering up the ISAs.
Diffstat (limited to 'src/arch/x86/utility.hh')
-rw-r--r-- | src/arch/x86/utility.hh | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh index d83353162..4c987faee 100644 --- a/src/arch/x86/utility.hh +++ b/src/arch/x86/utility.hh @@ -85,44 +85,6 @@ namespace X86ISA #endif } - inline bool isCallerSaveIntegerRegister(unsigned int reg) { - panic("register classification not implemented"); - return false; - } - - inline bool isCalleeSaveIntegerRegister(unsigned int reg) { - panic("register classification not implemented"); - return false; - } - - inline bool isCallerSaveFloatRegister(unsigned int reg) { - panic("register classification not implemented"); - return false; - } - - inline bool isCalleeSaveFloatRegister(unsigned int reg) { - panic("register classification not implemented"); - return false; - } - - // Instruction address compression hooks - inline Addr realPCToFetchPC(const Addr &addr) - { - return addr; - } - - inline Addr fetchPCToRealPC(const Addr &addr) - { - return addr; - } - - // the size of "fetched" instructions (not necessarily the size - // of real instructions for PISA) - inline size_t fetchInstSize() - { - return sizeof(MachInst); - } - /** * Function to insure ISA semantics about 0 registers. * @param tc The thread context. |