Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.

src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86

1 files changed, 11 insertions, 12 deletions

diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 0baa249c3..8c5d20c6e 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -59,11 +59,22 @@
 #define __ARCH_X86_UTILITY_HH__
 
 #include "arch/x86/types.hh"
+#include "base/hashmap.hh"
 #include "base/misc.hh"
 #include "sim/host.hh"
 
 class ThreadContext;
 
+namespace __hash_namespace {
+    template<>
+    struct hash<X86ISA::ExtMachInst> {
+        size_t operator()(const X86ISA::ExtMachInst &emi) const {
+            //Because these are all the same, return 0
+            return 0;
+        };
+    };
+}
+
 namespace X86ISA
 {
     static inline bool
@@ -72,18 +83,6 @@ namespace X86ISA
         return false;
     }
 
-    PredecodeResult {
-        MoreBytes = 1,
-        ExtMIReady = 2
-    };
-
-    unsigned int
-    predecode(ExtMachInst &extMachInst, Addr currPC, MachInst machInst,
-            ThreadContext * xc) {
-        //Do something to fill up extMachInst...
-        return MoreBytes | ExtMIReady;
-    }
-
     inline bool isCallerSaveIntegerRegister(unsigned int reg) {
         panic("register classification not implemented");
         return false;