X86: Use the AddrTrie class to implement the TLB.

This change also adjusts the TlbEntry class so that it stores the number of
address bits wide a page is rather than its size in bytes. In other words,
instead of storing 4K for a 4K page, it stores 12. 12 is easy to turn into 4K,
but it's a little harder going the other way.

1 files changed, 4 insertions, 3 deletions

diff --git a/src/arch/x86/vtophys.cc b/src/arch/x86/vtophys.cc
index e4abfca59..9fd9cc78d 100644
--- a/src/arch/x86/vtophys.cc
+++ b/src/arch/x86/vtophys.cc
@@ -61,12 +61,13 @@ namespace X86ISA
     vtophys(ThreadContext *tc, Addr vaddr)
     {
         Walker *walker = tc->getDTBPtr()->getWalker();
-        Addr size;
+        unsigned logBytes;
         Addr addr = vaddr;
-        Fault fault = walker->startFunctional(tc, addr, size, BaseTLB::Read);
+        Fault fault = walker->startFunctional(
+                tc, addr, logBytes, BaseTLB::Read);
         if (fault != NoFault)
             panic("vtophys page walk returned fault\n");
-        Addr masked_addr = vaddr & (size - 1);
+        Addr masked_addr = vaddr & mask(logBytes);
         Addr paddr = addr | masked_addr;
         DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
         return paddr;