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authorGabe Black <gblack@eecs.umich.edu>2007-10-02 23:00:37 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-10-02 23:00:37 -0700
commit504f90f76350ce14debfbfa837423144b0abdbe4 (patch)
tree610f9dfdcd624ab6c6a5524dc5dbe3eca073b77d /src/arch/x86/vtophys.hh
parentf4a932a6b3f5b829dd0e7cb3a596a7e054fd7144 (diff)
downloadgem5-504f90f76350ce14debfbfa837423144b0abdbe4.tar.xz
X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging.
--HG-- extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
Diffstat (limited to 'src/arch/x86/vtophys.hh')
-rw-r--r--src/arch/x86/vtophys.hh3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/arch/x86/vtophys.hh b/src/arch/x86/vtophys.hh
index 00d0f9499..be5e2700f 100644
--- a/src/arch/x86/vtophys.hh
+++ b/src/arch/x86/vtophys.hh
@@ -68,9 +68,6 @@ class FunctionalPort;
namespace X86ISA
{
-PageTableEntry
-kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, X86ISA::VAddr vaddr);
-
Addr vtophys(Addr vaddr);
Addr vtophys(ThreadContext *tc, Addr vaddr);