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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 13:28:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 13:28:54 -0700
commit557bde43c331024eb5cecf4093a24a5b7a9cc266 (patch)
treeb5bf7d105deb94b19098c431263aa6304bcae333 /src/arch/x86/x86_traits.hh
parente4590131825d27293d9642d2ac118ff03cc894f4 (diff)
downloadgem5-557bde43c331024eb5cecf4093a24a5b7a9cc266.tar.xz
X86: Make APICs communicate through the memory system.
Diffstat (limited to 'src/arch/x86/x86_traits.hh')
-rw-r--r--src/arch/x86/x86_traits.hh8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh
index 6b4671a08..be7572517 100644
--- a/src/arch/x86/x86_traits.hh
+++ b/src/arch/x86/x86_traits.hh
@@ -93,6 +93,7 @@ namespace X86ISA
const Addr PhysAddrPrefixIO = ULL(0x8000000000000000);
const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000);
const Addr PhysAddrPrefixLocalAPIC = ULL(0xA000000000000000);
+ const Addr PhysAddrPrefixInterrupts = ULL(0x2000000000000000);
// Each APIC gets two pages. One page is used for local apics to field
// accesses from the CPU, and the other is for all APICs to communicate.
const Addr PhysAddrAPICRangeSize = 1 << 12;
@@ -115,6 +116,13 @@ namespace X86ISA
assert(addr < (1 << 12));
return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr;
}
+
+ static inline Addr
+ x86InterruptAddress(const uint8_t id, const uint16_t addr)
+ {
+ assert(addr < PhysAddrAPICRangeSize);
+ return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
+ }
}
#endif //__ARCH_X86_X86TRAITS_HH__