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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-11 09:25:43 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-11 09:25:43 -0500 |
| commit | 6369df59c85870c0975bc881d7b7d612c9dcf15b (patch) | |
| tree | 0037bd2955043db5b60c5b967161ed45d30c5d21 /src/arch/x86/x86_traits.hh | |
| parent | 3700e5448a947197f16e6da07368cbe5fe783fd6 (diff) | |
| download | gem5-6369df59c85870c0975bc881d7b7d612c9dcf15b.tar.xz | |
x86: Add a separate register for D flag bit
The D flag bit is part of the cc flag bit register currently. But since it
is not being used any where in the implementation, it creates an unnecessary
dependency. Hence, it is being moved to a separate register.
Diffstat (limited to 'src/arch/x86/x86_traits.hh')
| -rw-r--r-- | src/arch/x86/x86_traits.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh index 6157cb30b..408fda106 100644 --- a/src/arch/x86/x86_traits.hh +++ b/src/arch/x86/x86_traits.hh @@ -46,7 +46,7 @@ namespace X86ISA { const int NumMicroIntRegs = 16; - const int NumPseudoIntRegs = 4; + const int NumPseudoIntRegs = 5; //1. The condition code bits of the rflags register. const int NumImplicitIntRegs = 6; //1. The lower part of the result of multiplication. |