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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-18 22:39:00 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-18 22:39:00 -0700 |
| commit | dc2e887f238d48f15364d9937bc71940d3849c0a (patch) | |
| tree | 66a15a82e0f159ecda21a03044debd00c8db5b02 /src/arch/x86/x86_traits.hh | |
| parent | 2bbc058c6c5e54c032106f804dd3084ed11f0f09 (diff) | |
| download | gem5-dc2e887f238d48f15364d9937bc71940d3849c0a.tar.xz | |
X86: Implement the in/out instructions. These will still need support from the TLB and memory system.
--HG--
extra : convert_revision : a9503248ea9efca7e5247e4f2830967f428b8215
Diffstat (limited to 'src/arch/x86/x86_traits.hh')
| -rw-r--r-- | src/arch/x86/x86_traits.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh index beb1898ce..dd9258db0 100644 --- a/src/arch/x86/x86_traits.hh +++ b/src/arch/x86/x86_traits.hh @@ -86,6 +86,7 @@ namespace X86ISA const Addr IntAddrPrefixMask = ULL(0xffffffff00000000); const Addr IntAddrPrefixCPUID = ULL(0x100000000); const Addr IntAddrPrefixMSR = ULL(0x200000000); + const Addr IntAddrPrefixIO = ULL(0x300000000); } #endif //__ARCH_X86_X86TRAITS_HH__ |