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authorLisa Hsu <hsul@eecs.umich.edu>2008-11-02 21:57:07 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2008-11-02 21:57:07 -0500
commitd857faf073895dcfde97141bd6346fe5d4317f8e (patch)
treebfcd9fadba95b409721597948dd46cfda3744ee0 /src/arch/x86
parent67fda02dda290d614de233846fee434b3713b1dc (diff)
downloadgem5-d857faf073895dcfde97141bd6346fe5d4317f8e.tar.xz
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/tlb.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 17374fa0c..4980c5fe5 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -654,7 +654,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute)
*/
// Force the access to be uncacheable.
req->setFlags(req->getFlags() | UNCACHEABLE);
- req->setPaddr(x86LocalAPICAddress(tc->cpuId(), paddr - baseAddr));
+ req->setPaddr(x86LocalAPICAddress(tc->contextId(), paddr - baseAddr));
}
#endif
return NoFault;