ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.

This eliminates a use of the ExtMachInst type outside of the ISAs.

4 files changed, 55 insertions, 11 deletions

diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index 92b30ced1..eb87afd94 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -57,6 +57,7 @@ if env['TARGET_ISA'] == 'x86':
     Source('insts/static_inst.cc')
     Source('interrupts.cc')
     Source('isa.cc')
+    Source('isa_traits.cc')
     Source('linux/linux.cc')
     Source('linux/process.cc')
     Source('linux/syscalls.cc')
diff --git a/src/arch/x86/isa_traits.cc b/src/arch/x86/isa_traits.cc
new file mode 100644
index 000000000..e2c803f1f
--- /dev/null
+++ b/src/arch/x86/isa_traits.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2012 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/generated/decoder.hh"
+#include "arch/x86/x86_traits.hh"
+
+namespace X86ISA
+{
+
+const StaticInstPtr NoopStaticInst = new X86ISAInst::NOP(NoopMachInst);
+
+}
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 383e56eee..338ea4f4d 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -43,6 +43,7 @@
 #include "arch/x86/types.hh"
 #include "arch/x86/x86_traits.hh"
 #include "base/types.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace LittleEndianGuest {}
 
@@ -71,17 +72,7 @@ namespace X86ISA
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;
 
-    const ExtMachInst NoopMachInst = {
-        0x0,                            // No legacy prefixes.
-        0x0,                            // No rex prefix.
-        { 1, 0x0, 0x0, 0x90 },          // One opcode byte, 0x90.
-        0x0, 0x0,                       // No modrm or sib.
-        0, 0,                           // No immediate or displacement.
-        8, 8, 8,                        // All sizes are 8.
-        0,                              // Displacement size is 0.
-        SixtyFourBitMode                // Behave as if we're in 64 bit
-                                        // mode (this doesn't actually matter).
-    };
+    extern const StaticInstPtr NoopStaticInst;
 }
 
 #endif // __ARCH_X86_ISATRAITS_HH__
diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh
index 6157cb30b..a94d806ef 100644
--- a/src/arch/x86/x86_traits.hh
+++ b/src/arch/x86/x86_traits.hh
@@ -40,6 +40,7 @@
 
 #include <cassert>
 
+#include "arch/x86/types.hh"
 #include "base/types.hh"
 
 namespace X86ISA
@@ -104,6 +105,18 @@ namespace X86ISA
         assert(addr < PhysAddrAPICRangeSize);
         return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
     }
+
+    const ExtMachInst NoopMachInst = {
+        0x0,                            // No legacy prefixes.
+        0x0,                            // No rex prefix.
+        { 1, 0x0, 0x0, 0x90 },          // One opcode byte, 0x90.
+        0x0, 0x0,                       // No modrm or sib.
+        0, 0,                           // No immediate or displacement.
+        8, 8, 8,                        // All sizes are 8.
+        0,                              // Displacement size is 0.
+        SixtyFourBitMode                // Behave as if we're in 64 bit
+                                        // mode (this doesn't actually matter).
+    };
 }
 
 #endif //__ARCH_X86_X86TRAITS_HH__