Clock: Add a Cycles wrapper class and use where applicable

This patch addresses the comments and feedback on the preceding patch
that reworks the clocks and now more clearly shows where cycles
(relative cycle counts) are used to express time.

Instead of bumping the existing patch I chose to make this a separate
patch, merely to try and focus the discussion around a smaller set of
changes. The two patches will be pushed together though.

This changes done as part of this patch are mostly following directly
from the introduction of the wrapper class, and change enough code to
make things compile and run again. There are definitely more places
where int/uint/Tick is still used to represent cycles, and it will
take some time to chase them all down. Similarly, a lot of parameters
should be changed from Param.Tick and Param.Unsigned to
Param.Cycles.

In addition, the use of curTick is questionable as there should not be
an absolute cycle. Potential solutions can be built on top of this
patch. There is a similar situation in the o3 CPU where
lastRunningCycle is currently counting in Cycles, and is still an
absolute time. More discussion to be had in other words.

An additional change that would be appropriate in the future is to
perform a similar wrapping of Tick and probably also introduce a
Ticks class along with suitable operators for all these classes.

2 files changed, 7 insertions, 7 deletions

diff --git a/src/arch/x86/mmapped_ipr.hh b/src/arch/x86/mmapped_ipr.hh
index f17b64cad..02c125171 100644
--- a/src/arch/x86/mmapped_ipr.hh
+++ b/src/arch/x86/mmapped_ipr.hh
@@ -53,7 +53,7 @@
 
 namespace X86ISA
 {
-    inline Tick
+    inline Cycles
     handleIprRead(ThreadContext *xc, Packet *pkt)
     {
         Addr offset = pkt->getAddr() & mask(3);
@@ -62,10 +62,10 @@ namespace X86ISA
         // Make sure we don't trot off the end of data.
         assert(offset + pkt->getSize() <= sizeof(MiscReg));
         pkt->setData(((uint8_t *)&data) + offset);
-        return 1;
+        return Cycles(1);
     }
 
-    inline Tick
+    inline Cycles
     handleIprWrite(ThreadContext *xc, Packet *pkt)
     {
         Addr offset = pkt->getAddr() & mask(3);
@@ -76,7 +76,7 @@ namespace X86ISA
         assert(offset + pkt->getSize() <= sizeof(MiscReg));
         pkt->writeData(((uint8_t *)&data) + offset);
         xc->setMiscReg(index, gtoh(data));
-        return 1;
+        return Cycles(1);
     }
 }
 
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc
index acca97c49..65c1a9d32 100644
--- a/src/arch/x86/utility.cc
+++ b/src/arch/x86/utility.cc
@@ -176,7 +176,7 @@ void initCPU(ThreadContext *tc, int cpuId)
 
     // @todo: Control the relative frequency, in this case 16:1, of
     // the clocks in the Python code
-    interrupts->setClock(tc->getCpuPtr()->ticks(16));
+    interrupts->setClock(tc->getCpuPtr()->clockPeriod() * 16);
 
     // TODO Set the SMRAM base address (SMBASE) to 0x00030000
 
@@ -189,12 +189,12 @@ void initCPU(ThreadContext *tc, int cpuId)
 void startupCPU(ThreadContext *tc, int cpuId)
 {
     if (cpuId == 0 || !FullSystem) {
-        tc->activate(0);
+        tc->activate(Cycles(0));
     } else {
         // This is an application processor (AP). It should be initialized to
         // look like only the BIOS POST has run on it and put then put it into
         // a halted state.
-        tc->suspend(0);
+        tc->suspend(Cycles(0));
     }
 }