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authorAndreas Hansson <andreas.hansson@arm.com>2014-01-24 15:29:30 -0600
committerAndreas Hansson <andreas.hansson@arm.com>2014-01-24 15:29:30 -0600
commitcfc4a999828a5b51f4c514e3a7c47b4eebc450b9 (patch)
treed84604c311cecf8c2ab48931a8b61b7bc637eef4 /src/arch/x86
parent9633282fc8f152ba897347d38fa85a7b374e3d1e (diff)
downloadgem5-cfc4a999828a5b51f4c514e3a7c47b4eebc450b9.tar.xz
arch: Make all register index flattening const
This patch makes all the register index flattening methods const for all the ISAs. As part of this, readMiscRegNoEffect for ARM is also made const.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/isa.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 14c8e98c9..3ca771c61 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -70,13 +70,13 @@ namespace X86ISA
void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
int
- flattenIntIndex(int reg)
+ flattenIntIndex(int reg) const
{
return reg & ~IntFoldBit;
}
int
- flattenFloatIndex(int reg)
+ flattenFloatIndex(int reg) const
{
if (reg >= NUM_FLOATREGS) {
reg = FLOATREG_STACK(reg - NUM_FLOATREGS,
@@ -86,13 +86,13 @@ namespace X86ISA
}
int
- flattenCCIndex(int reg)
+ flattenCCIndex(int reg) const
{
return reg;
}
int
- flattenMiscIndex(int reg)
+ flattenMiscIndex(int reg) const
{
return reg;
}