diff options
author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-07-07 09:51:03 +0100 |
---|---|---|
committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-07-07 09:51:03 +0100 |
commit | 76cd4393c08b83fa9006ee7bce1fb62457e053c1 (patch) | |
tree | f1d2d109f77a8cf31365143d6eb127b610d924f5 /src/arch/x86 | |
parent | d7a56ee524c976a41fa40e5382a28462de799645 (diff) | |
download | gem5-76cd4393c08b83fa9006ee7bce1fb62457e053c1.tar.xz |
sim: Refactor the serialization base class
Objects that are can be serialized are supposed to inherit from the
Serializable class. This class is meant to provide a unified API for
such objects. However, so far it has mainly been used by SimObjects
due to some fundamental design limitations. This changeset redesigns
to the serialization interface to make it more generic and hide the
underlying checkpoint storage. Specifically:
* Add a set of APIs to serialize into a subsection of the current
object. Previously, objects that needed this functionality would
use ad-hoc solutions using nameOut() and section name
generation. In the new world, an object that implements the
interface has the methods serializeSection() and
unserializeSection() that serialize into a named /subsection/ of
the current object. Calling serialize() serializes an object into
the current section.
* Move the name() method from Serializable to SimObject as it is no
longer needed for serialization. The fully qualified section name
is generated by the main serialization code on the fly as objects
serialize sub-objects.
* Add a scoped ScopedCheckpointSection helper class. Some objects
need to serialize data structures, that are not deriving from
Serializable, into subsections. Previously, this was done using
nameOut() and manual section name generation. To simplify this,
this changeset introduces a ScopedCheckpointSection() helper
class. When this class is instantiated, it adds a new /subsection/
and subsequent serialization calls during the lifetime of this
helper class happen inside this section (or a subsection in case
of nested sections).
* The serialize() call is now const which prevents accidental state
manipulation during serialization. Objects that rely on modifying
state can use the serializeOld() call instead. The default
implementation simply calls serialize(). Note: The old-style calls
need to be explicitly called using the
serializeOld()/serializeSectionOld() style APIs. These are used by
default when serializing SimObjects.
* Both the input and output checkpoints now use their own named
types. This hides underlying checkpoint implementation from
objects that need checkpointing and makes it easier to change the
underlying checkpoint storage code.
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/interrupts.cc | 4 | ||||
-rw-r--r-- | src/arch/x86/interrupts.hh | 5 | ||||
-rw-r--r-- | src/arch/x86/isa.cc | 4 | ||||
-rw-r--r-- | src/arch/x86/isa.hh | 5 | ||||
-rw-r--r-- | src/arch/x86/pagetable.cc | 13 | ||||
-rw-r--r-- | src/arch/x86/pagetable.hh | 8 | ||||
-rw-r--r-- | src/arch/x86/tlb.cc | 21 | ||||
-rw-r--r-- | src/arch/x86/tlb.hh | 6 | ||||
-rw-r--r-- | src/arch/x86/types.cc | 57 | ||||
-rw-r--r-- | src/arch/x86/types.hh | 14 |
10 files changed, 69 insertions, 68 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 171e8a1c5..556cdda37 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -729,7 +729,7 @@ X86ISA::Interrupts::updateIntrInfo(ThreadContext *tc) } void -X86ISA::Interrupts::serialize(std::ostream &os) +X86ISA::Interrupts::serialize(CheckpointOut &cp) const { SERIALIZE_ARRAY(regs, NUM_APIC_REGS); SERIALIZE_SCALAR(pendingSmi); @@ -754,7 +754,7 @@ X86ISA::Interrupts::serialize(std::ostream &os) } void -X86ISA::Interrupts::unserialize(Checkpoint *cp, const std::string §ion) +X86ISA::Interrupts::unserialize(CheckpointIn &cp) { UNSERIALIZE_ARRAY(regs, NUM_APIC_REGS); UNSERIALIZE_SCALAR(pendingSmi); diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh index b584c234b..272cfea44 100644 --- a/src/arch/x86/interrupts.hh +++ b/src/arch/x86/interrupts.hh @@ -293,9 +293,8 @@ class Interrupts : public BasicPioDevice, IntDevice /* * Serialization. */ - - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; /* * Old functions needed for compatability but which will be phased out diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index f9b99db0f..213a9e2e3 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -409,13 +409,13 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc) } void -ISA::serialize(std::ostream & os) +ISA::serialize(CheckpointOut &cp) const { SERIALIZE_ARRAY(regVal, NumMiscRegs); } void -ISA::unserialize(Checkpoint * cp, const std::string & section) +ISA::unserialize(CheckpointIn &cp) { UNSERIALIZE_ARRAY(regVal, NumMiscRegs); updateHandyM5Reg(regVal[MISCREG_EFER], diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh index a82b4ae2f..88f4980ae 100644 --- a/src/arch/x86/isa.hh +++ b/src/arch/x86/isa.hh @@ -97,8 +97,9 @@ namespace X86ISA return reg; } - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void startup(ThreadContext *tc); /// Explicitly import the otherwise hidden startup diff --git a/src/arch/x86/pagetable.cc b/src/arch/x86/pagetable.cc index cd4df42e7..4e8c39eb9 100644 --- a/src/arch/x86/pagetable.cc +++ b/src/arch/x86/pagetable.cc @@ -45,15 +45,22 @@ namespace X86ISA { +TlbEntry::TlbEntry() + : paddr(0), vaddr(0), logBytes(0), writable(0), + user(true), uncacheable(0), global(false), patBit(0), + noExec(false), lruSeq(0) +{ +} + TlbEntry::TlbEntry(Addr asn, Addr _vaddr, Addr _paddr, bool uncacheable, bool read_only) : paddr(_paddr), vaddr(_vaddr), logBytes(PageShift), writable(!read_only), user(true), uncacheable(uncacheable), global(false), patBit(0), - noExec(false) + noExec(false), lruSeq(0) {} void -TlbEntry::serialize(std::ostream &os) +TlbEntry::serialize(CheckpointOut &cp) const { SERIALIZE_SCALAR(paddr); SERIALIZE_SCALAR(vaddr); @@ -68,7 +75,7 @@ TlbEntry::serialize(std::ostream &os) } void -TlbEntry::unserialize(Checkpoint *cp, const std::string §ion) +TlbEntry::unserialize(CheckpointIn &cp) { UNSERIALIZE_SCALAR(paddr); UNSERIALIZE_SCALAR(vaddr); diff --git a/src/arch/x86/pagetable.hh b/src/arch/x86/pagetable.hh index 639815893..3345366d0 100644 --- a/src/arch/x86/pagetable.hh +++ b/src/arch/x86/pagetable.hh @@ -97,7 +97,7 @@ namespace X86ISA EndBitUnion(PageTableEntry) - struct TlbEntry + struct TlbEntry : public Serializable { // The base of the physical page. Addr paddr; @@ -130,7 +130,7 @@ namespace X86ISA TlbEntry(Addr asn, Addr _vaddr, Addr _paddr, bool uncacheable, bool read_only); - TlbEntry() {} + TlbEntry(); void updateVaddr(Addr new_vaddr) @@ -149,8 +149,8 @@ namespace X86ISA return (1 << logBytes); } - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; }; /** The size of each level of the page table expressed in base 2 diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 86e051deb..d0e77bc9b 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -62,13 +62,12 @@ namespace X86ISA { -TLB::TLB(const Params *p) : BaseTLB(p), configAddress(0), size(p->size), - lruSeq(0) +TLB::TLB(const Params *p) + : BaseTLB(p), configAddress(0), size(p->size), + tlb(size), lruSeq(0) { if (!size) fatal("TLBs must have a non-zero size.\n"); - tlb = new TlbEntry[size]; - std::memset(tlb, 0, sizeof(TlbEntry) * size); for (int x = 0; x < size; x++) { tlb[x].trieHandle = NULL; @@ -451,7 +450,7 @@ TLB::getWalker() } void -TLB::serialize(std::ostream &os) +TLB::serialize(CheckpointOut &cp) const { // Only store the entries in use. uint32_t _size = size - freeList.size(); @@ -459,18 +458,14 @@ TLB::serialize(std::ostream &os) SERIALIZE_SCALAR(lruSeq); uint32_t _count = 0; - for (uint32_t x = 0; x < size; x++) { - if (tlb[x].trieHandle != NULL) { - os << "\n[" << csprintf("%s.Entry%d", name(), _count) << "]\n"; - tlb[x].serialize(os); - _count++; - } + if (tlb[x].trieHandle != NULL) + tlb[x].serializeSection(cp, csprintf("Entry%d", _count++)); } } void -TLB::unserialize(Checkpoint *cp, const std::string §ion) +TLB::unserialize(CheckpointIn &cp) { // Do not allow to restore with a smaller tlb. uint32_t _size; @@ -485,7 +480,7 @@ TLB::unserialize(Checkpoint *cp, const std::string §ion) TlbEntry *newEntry = freeList.front(); freeList.pop_front(); - newEntry->unserialize(cp, csprintf("%s.Entry%d", name(), x)); + newEntry->unserializeSection(cp, csprintf("Entry%d", x)); newEntry->trieHandle = trie.insert(newEntry->vaddr, TlbEntryTrie::MaxBits - newEntry->logBytes, newEntry); } diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 77f9fc49d..83ec7cc59 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -98,7 +98,7 @@ namespace X86ISA protected: uint32_t size; - TlbEntry * tlb; + std::vector<TlbEntry> tlb; EntryList freeList; @@ -148,8 +148,8 @@ namespace X86ISA TlbEntry * insert(Addr vpn, TlbEntry &entry); // Checkpointing - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; /** * Get the table walker master port. This is used for diff --git a/src/arch/x86/types.cc b/src/arch/x86/types.cc index 830a131e5..a960205b5 100644 --- a/src/arch/x86/types.cc +++ b/src/arch/x86/types.cc @@ -36,69 +36,68 @@ using namespace std; template <> void -paramOut(ostream &os, const string &name, ExtMachInst const &machInst) +paramOut(CheckpointOut &cp, const string &name, ExtMachInst const &machInst) { // Prefixes - paramOut(os, name + ".legacy", (uint8_t)machInst.legacy); - paramOut(os, name + ".rex", (uint8_t)machInst.rex); + paramOut(cp, name + ".legacy", (uint8_t)machInst.legacy); + paramOut(cp, name + ".rex", (uint8_t)machInst.rex); // Opcode - paramOut(os, name + ".opcode.type", (uint8_t)machInst.opcode.type); - paramOut(os, name + ".opcode.op", (uint8_t)machInst.opcode.op); + paramOut(cp, name + ".opcode.type", (uint8_t)machInst.opcode.type); + paramOut(cp, name + ".opcode.op", (uint8_t)machInst.opcode.op); // Modifier bytes - paramOut(os, name + ".modRM", (uint8_t)machInst.modRM); - paramOut(os, name + ".sib", (uint8_t)machInst.sib); + paramOut(cp, name + ".modRM", (uint8_t)machInst.modRM); + paramOut(cp, name + ".sib", (uint8_t)machInst.sib); // Immediate fields - paramOut(os, name + ".immediate", machInst.immediate); - paramOut(os, name + ".displacement", machInst.displacement); + paramOut(cp, name + ".immediate", machInst.immediate); + paramOut(cp, name + ".displacement", machInst.displacement); // Sizes - paramOut(os, name + ".opSize", machInst.opSize); - paramOut(os, name + ".addrSize", machInst.addrSize); - paramOut(os, name + ".stackSize", machInst.stackSize); - paramOut(os, name + ".dispSize", machInst.dispSize); + paramOut(cp, name + ".opSize", machInst.opSize); + paramOut(cp, name + ".addrSize", machInst.addrSize); + paramOut(cp, name + ".stackSize", machInst.stackSize); + paramOut(cp, name + ".dispSize", machInst.dispSize); // Mode - paramOut(os, name + ".mode", (uint8_t)machInst.mode); + paramOut(cp, name + ".mode", (uint8_t)machInst.mode); } template <> void -paramIn(Checkpoint *cp, const string §ion, - const string &name, ExtMachInst &machInst) +paramIn(CheckpointIn &cp, const string &name, ExtMachInst &machInst) { uint8_t temp8; // Prefixes - paramIn(cp, section, name + ".legacy", temp8); + paramIn(cp, name + ".legacy", temp8); machInst.legacy = temp8; - paramIn(cp, section, name + ".rex", temp8); + paramIn(cp, name + ".rex", temp8); machInst.rex = temp8; // Opcode - paramIn(cp, section, name + ".opcode.type", temp8); + paramIn(cp, name + ".opcode.type", temp8); machInst.opcode.type = (OpcodeType)temp8; - paramIn(cp, section, name + ".opcode.op", temp8); + paramIn(cp, name + ".opcode.op", temp8); machInst.opcode.op = temp8; // Modifier bytes - paramIn(cp, section, name + ".modRM", temp8); + paramIn(cp, name + ".modRM", temp8); machInst.modRM = temp8; - paramIn(cp, section, name + ".sib", temp8); + paramIn(cp, name + ".sib", temp8); machInst.sib = temp8;; // Immediate fields - paramIn(cp, section, name + ".immediate", machInst.immediate); - paramIn(cp, section, name + ".displacement", machInst.displacement); + paramIn(cp, name + ".immediate", machInst.immediate); + paramIn(cp, name + ".displacement", machInst.displacement); // Sizes - paramIn(cp, section, name + ".opSize", machInst.opSize); - paramIn(cp, section, name + ".addrSize", machInst.addrSize); - paramIn(cp, section, name + ".stackSize", machInst.stackSize); - paramIn(cp, section, name + ".dispSize", machInst.dispSize); + paramIn(cp, name + ".opSize", machInst.opSize); + paramIn(cp, name + ".addrSize", machInst.addrSize); + paramIn(cp, name + ".stackSize", machInst.stackSize); + paramIn(cp, name + ".dispSize", machInst.dispSize); // Mode - paramIn(cp, section, name + ".mode", temp8); + paramIn(cp, name + ".mode", temp8); machInst.mode = temp8; } diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh index dd60c0aec..23d60020b 100644 --- a/src/arch/x86/types.hh +++ b/src/arch/x86/types.hh @@ -276,16 +276,16 @@ namespace X86ISA } void - serialize(std::ostream &os) + serialize(CheckpointOut &cp) const { - Base::serialize(os); + Base::serialize(cp); SERIALIZE_SCALAR(_size); } void - unserialize(Checkpoint *cp, const std::string §ion) + unserialize(CheckpointIn &cp) { - Base::unserialize(cp, section); + Base::unserialize(cp); UNSERIALIZE_SCALAR(_size); } }; @@ -314,11 +314,11 @@ __hash_namespace_end // and UNSERIALIZE_SCALAR. template <> void -paramOut(std::ostream &os, const std::string &name, +paramOut(CheckpointOut &cp, const std::string &name, const X86ISA::ExtMachInst &machInst); template <> void -paramIn(Checkpoint *cp, const std::string §ion, - const std::string &name, X86ISA::ExtMachInst &machInst); +paramIn(CheckpointIn &cp, const std::string &name, + X86ISA::ExtMachInst &machInst); #endif // __ARCH_X86_TYPES_HH__ |