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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-03 14:35:43 -0800 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-03 14:35:43 -0800 |
commit | c69d48f007d2521fdbea52a0a7a95cfc4a547174 (patch) | |
tree | 59a866d2f48310090b5dd18dad0095029314cb6f /src/arch/x86 | |
parent | 1a10ccc5e551857fc3a7c049df99547ccfe3f72b (diff) | |
download | gem5-c69d48f007d2521fdbea52a0a7a95cfc4a547174.tar.xz |
Make commenting on close namespace brackets consistent.
Ran all the source files through 'perl -pi' with this script:
s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|;
s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|;
s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|;
Also did a little manual editing on some of the arch/*/isa_traits.hh files
and src/SConscript.
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/cpuid.cc | 2 | ||||
-rw-r--r-- | src/arch/x86/nativetrace.cc | 2 | ||||
-rw-r--r-- | src/arch/x86/nativetrace.hh | 2 | ||||
-rw-r--r-- | src/arch/x86/registers.hh | 2 | ||||
-rw-r--r-- | src/arch/x86/tlb.cc | 2 | ||||
-rw-r--r-- | src/arch/x86/utility.cc | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc index 6b686f38a..fa5e30698 100644 --- a/src/arch/x86/cpuid.cc +++ b/src/arch/x86/cpuid.cc @@ -158,4 +158,4 @@ namespace X86ISA { } return true; } -} //namespace X86ISA +} // namespace X86ISA diff --git a/src/arch/x86/nativetrace.cc b/src/arch/x86/nativetrace.cc index 6f92cfacf..1999f6611 100644 --- a/src/arch/x86/nativetrace.cc +++ b/src/arch/x86/nativetrace.cc @@ -186,7 +186,7 @@ X86NativeTrace::check(NativeTraceRecord *record) checkXMM(15, mState.xmm, nState.xmm); } -} /* namespace Trace */ +} // namespace Trace //////////////////////////////////////////////////////////////////////// // diff --git a/src/arch/x86/nativetrace.hh b/src/arch/x86/nativetrace.hh index afa2a463d..c68f01455 100644 --- a/src/arch/x86/nativetrace.hh +++ b/src/arch/x86/nativetrace.hh @@ -85,6 +85,6 @@ class X86NativeTrace : public NativeTrace void check(NativeTraceRecord *record); }; -} /* namespace Trace */ +} // namespace Trace #endif // __ARCH_X86_NATIVETRACE_HH__ diff --git a/src/arch/x86/registers.hh b/src/arch/x86/registers.hh index ea737fa63..5882132e5 100644 --- a/src/arch/x86/registers.hh +++ b/src/arch/x86/registers.hh @@ -111,6 +111,6 @@ typedef union typedef uint16_t RegIndex; -}; // namespace X86ISA +} // namespace X86ISA #endif // __ARCH_X86_REGFILE_HH__ diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 52d9cdf9c..7fa2e172c 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -737,7 +737,7 @@ TLB::unserialize(Checkpoint *cp, const std::string §ion) { } -/* end namespace X86ISA */ } +} // namespace X86ISA X86ISA::TLB * X86TLBParams::create() diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index 88d5bfe58..756e9d526 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -243,4 +243,4 @@ skipFunction(ThreadContext *tc) } -} //namespace X86_ISA +} // namespace X86_ISA |