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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:54 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:54 -0800
commit7b1cb74ac3c2b9a2a22f64ed88bd60fb353c76d7 (patch)
tree0d0e5ace782a89ebc58d53803f8f32baef730712 /src/arch/x86
parent82288e7c3eea0fc62746d746e325c888a13c0a22 (diff)
downloadgem5-7b1cb74ac3c2b9a2a22f64ed88bd60fb353c76d7.tar.xz
X86: Add a check to chks which raises #GP(selector) if selector is NULL or not in the GDT.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/isa/microasm.isa3
-rw-r--r--src/arch/x86/isa/microops/regop.isa8
2 files changed, 9 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 778754e0c..354ee089e 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -86,7 +86,8 @@ let {{
# Add in symbols for the various checks of segment selectors.
for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
- "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck"):
+ "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
+ "TRCheck"):
assembler.symbols[check] = "Seg%s" % check
for reg in ("TR", "IDTR"):
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 567335b7f..9fb8b2f92 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -234,7 +234,8 @@ output header {{
enum SegmentSelectorCheck {
SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
- SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck
+ SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck,
+ SegTRCheck
};
enum LongModeDescriptorType {
@@ -1118,6 +1119,11 @@ let {{
"in legacy mode.\\n");
}
break;
+ case SegTRCheck:
+ if (!selector.si || selector.ti) {
+ fault = new GeneralProtection(selector);
+ }
+ break;
default:
panic("Undefined segment check type.\\n");
}