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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 12:07:25 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 12:07:25 -0700
commite0f137a87c21eca5faa35cf0b9b529c4243d3ff3 (patch)
treeec8fba6d929fd978b6d9a7671057be48892bbd83 /src/arch/x86
parent42ebebf99a7d6ce2358b152f643b52c7946f9202 (diff)
downloadgem5-e0f137a87c21eca5faa35cf0b9b529c4243d3ff3.tar.xz
X86: Add a LocalApic trace flag.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/SConscript2
-rw-r--r--src/arch/x86/interrupts.cc6
2 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index e019b77c9..c1a1b9ba3 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -109,6 +109,8 @@ if env['TARGET_ISA'] == 'x86':
TraceFlag('X86')
if env['FULL_SYSTEM']:
+ TraceFlag('LocalApic')
+
SimObject('X86LocalApic.py')
SimObject('X86System.py')
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 5814859b3..6f1920de0 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -215,6 +215,9 @@ X86ISA::Interrupts::read(PacketPtr pkt)
panic("Accessed more than one register at a time in the APIC!\n");
ApicRegIndex reg = decodeAddr(offset);
uint32_t val = htog(readReg(reg));
+ DPRINTF(LocalApic,
+ "Reading Local APIC register %d at offset %#x as %#x.\n",
+ reg, offset, val);
pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
return latency;
}
@@ -229,6 +232,9 @@ X86ISA::Interrupts::write(PacketPtr pkt)
ApicRegIndex reg = decodeAddr(offset);
uint32_t val = regs[reg];
pkt->writeData(((uint8_t *)&val) + (offset & mask(3)));
+ DPRINTF(LocalApic,
+ "Writing Local APIC register %d at offset %#x as %#x.\n",
+ reg, offset, gtoh(val));
setReg(reg, gtoh(val));
return latency;
}