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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-03-25 02:08:54 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-03-25 02:08:54 -0400 |
| commit | 48409ca512da9e972b159d45068a1173d2ae1759 (patch) | |
| tree | 95d565a2e084b88e16940719767811e0fcb60f19 /src/arch/x86 | |
| parent | b0c52885ce5164c2c6105a1de1963c1d761477d1 (diff) | |
| download | gem5-48409ca512da9e972b159d45068a1173d2ae1759.tar.xz | |
X86: Start implementing the south bridge stuff.
--HG--
extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/x86_traits.hh | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh index d605ce218..f46279c81 100644 --- a/src/arch/x86/x86_traits.hh +++ b/src/arch/x86/x86_traits.hh @@ -90,6 +90,18 @@ namespace X86ISA const Addr PhysAddrPrefixIO = ULL(0x8000000000000000); const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000); + + static inline Addr + x86IOAddress(const uint32_t port) + { + return PhysAddrPrefixIO | port; + } + + static inline Addr + x86PciConfigAddress(const uint32_t addr) + { + return PhysAddrPrefixPciConfig | addr; + } } #endif //__ARCH_X86_X86TRAITS_HH__ |