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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-31 17:34:08 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-31 17:34:08 -0700 |
commit | 4bdabe1254a8ad9bb960f57eb35cec919b370de8 (patch) | |
tree | 318b34065ed9eb3f30852fee11eb398a92134652 /src/arch/x86 | |
parent | 55ade789d34e541cc538c7c5a4f286a313cfd8ba (diff) | |
download | gem5-4bdabe1254a8ad9bb960f57eb35cec919b370de8.tar.xz |
Add a flag to indicate an instruction triggers a syscall in SE mode.
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index a8c4e7062..e8307c6e6 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -70,7 +70,7 @@ #if FULL_SYSTEM 0x05: syscall(); #else - 0x05: SyscallInst::syscall('xc->syscall(rax)'); + 0x05: SyscallInst::syscall('xc->syscall(rax)', IsSyscall); #endif 0x06: clts(); //sandpile.org says (AMD) after sysret, so I might want to check |