diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
| commit | 5605079b1f20bc7f6a4a80c8d1e4daabe7125270 (patch) | |
| tree | 29dfa1685e3e257e3857ef7f9672778d43582440 /src/arch/x86 | |
| parent | a1aba01a02a8c1261120de83d8fbfd6624f0cb17 (diff) | |
| download | gem5-5605079b1f20bc7f6a4a80c8d1e4daabe7125270.tar.xz | |
ISA: Replace the translate functions in the TLBs with translateAtomic.
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/tlb.cc | 11 | ||||
| -rw-r--r-- | src/arch/x86/tlb.hh | 6 |
2 files changed, 9 insertions, 8 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 34829848c..33017a6aa 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -190,7 +190,8 @@ TLB::demapPage(Addr va, uint64_t asn) template<class TlbFault> Fault -TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) +TLB::translateAtomic(RequestPtr &req, ThreadContext *tc, + bool write, bool execute) { Addr vaddr = req->getVaddr(); DPRINTF(TLB, "Translating vaddr %#x.\n", vaddr); @@ -662,15 +663,15 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) }; Fault -DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) +DTB::translateAtomic(RequestPtr &req, ThreadContext *tc, bool write) { - return TLB::translate<FakeDTLBFault>(req, tc, write, false); + return TLB::translateAtomic<FakeDTLBFault>(req, tc, write, false); } Fault -ITB::translate(RequestPtr &req, ThreadContext *tc) +ITB::translateAtomic(RequestPtr &req, ThreadContext *tc) { - return TLB::translate<FakeITLBFault>(req, tc, false, true); + return TLB::translateAtomic<FakeITLBFault>(req, tc, false, true); } #if FULL_SYSTEM diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 56d635a90..91bb4a761 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -138,7 +138,7 @@ namespace X86ISA EntryList entryList; template<class TlbFault> - Fault translate(RequestPtr &req, ThreadContext *tc, + Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write, bool execute); public: @@ -159,7 +159,7 @@ namespace X86ISA _allowNX = false; } - Fault translate(RequestPtr &req, ThreadContext *tc); + Fault translateAtomic(RequestPtr &req, ThreadContext *tc); friend class DTB; }; @@ -172,7 +172,7 @@ namespace X86ISA { _allowNX = true; } - Fault translate(RequestPtr &req, ThreadContext *tc, bool write); + Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write); #if FULL_SYSTEM Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); |