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authorAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
commit58f69391cac4dcc3696470d08756d0c5ff308963 (patch)
treec97d3888e74ccd3cf3ffdb4ee96fd475c8c8c29a /src/arch/x86
parent9d026ac006f56ce735c3c6a9e37cfefcfb21523a (diff)
downloadgem5-58f69391cac4dcc3696470d08756d0c5ff308963.tar.xz
implement ipi stufff for SPARC
src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/arch/x86/utility.hh: add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi src/arch/sparc/isa/decoder.isa: handle writable bits of strandstatus register in miscregfile src/arch/sparc/miscregfile.hh: some constants for the strand status register src/arch/sparc/ua2005.cc: properly implement the strand status register src/dev/sparc/iob.cc: implement ipi generation properly src/sim/system.cc: call into the ISA to start the CPU (or not) --HG-- extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/utility.hh5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 1d9d8d3d5..1fbe1fffe 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -126,6 +126,11 @@ namespace X86ISA
{
panic("initCPU not implemented!\n");
}
+
+ inline void startupCPU(ThreadContext *tc, int cpuId)
+ {
+ tc->activate(0);
+ }
};
#endif // __ARCH_X86_UTILITY_HH__