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authorCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
commit7f1603d20728d7990d1d304bbdb6abdfb7eb53d7 (patch)
tree1e7b8267b063cdf10c8180757b6b2f002dea8898 /src/arch/x86
parenteb61f0123b992236b3ef8331ed35d5954a62a44d (diff)
downloadgem5-7f1603d20728d7990d1d304bbdb6abdfb7eb53d7.tar.xz
arch: remove inline specifiers on all inst constrs, all ISAs
With (upcoming) separate compilation, they are useless. Only link-time optimization could re-inline them, but ideally feedback-directed optimization would choose to do so only for profitable (i.e. common) instructions.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/isa/formats/basic.isa2
-rw-r--r--src/arch/x86/isa/macroop.isa2
-rw-r--r--src/arch/x86/isa/microops/fpop.isa2
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa2
-rw-r--r--src/arch/x86/isa/microops/limmop.isa2
-rw-r--r--src/arch/x86/isa/microops/mediaop.isa4
-rw-r--r--src/arch/x86/isa/microops/regop.isa4
-rw-r--r--src/arch/x86/isa/microops/seqop.isa4
-rw-r--r--src/arch/x86/isa/microops/specop.isa6
9 files changed, 14 insertions, 14 deletions
diff --git a/src/arch/x86/isa/formats/basic.isa b/src/arch/x86/isa/formats/basic.isa
index 6624c03ae..d8f8592d7 100644
--- a/src/arch/x86/isa/formats/basic.isa
+++ b/src/arch/x86/isa/formats/basic.isa
@@ -68,7 +68,7 @@ def template BasicDeclare {{
// Basic instruction class constructor template.
def template BasicConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
+ %(class_name)s::%(class_name)s(ExtMachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(constructor)s;
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index d510a0c7c..818cfc3ea 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -110,7 +110,7 @@ def template MacroDisassembly {{
// Basic instruction class constructor template.
def template MacroConstructor {{
- inline X86Macroop::%(class_name)s::%(class_name)s(
+ X86Macroop::%(class_name)s::%(class_name)s(
ExtMachInst machInst, EmulEnv _env)
: %(base_class)s("%(mnemonic)s", machInst, %(num_microops)s, _env)
{
diff --git a/src/arch/x86/isa/microops/fpop.isa b/src/arch/x86/isa/microops/fpop.isa
index 3c6753712..131284076 100644
--- a/src/arch/x86/isa/microops/fpop.isa
+++ b/src/arch/x86/isa/microops/fpop.isa
@@ -88,7 +88,7 @@ def template MicroFpOpDeclare {{
}};
def template MicroFpOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _dataSize, int8_t _spm) :
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 1b22b88de..b82cf57e0 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -254,7 +254,7 @@ def template MicroLdStOpDeclare {{
}};
def template MicroLdStOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
uint64_t _disp, InstRegIndex _segment,
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index 2c61aaa45..e7cd548ec 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -90,7 +90,7 @@ def template MicroLimmOpDisassembly {{
}};
def template MicroLimmOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _dest, uint64_t _imm, uint8_t _dataSize) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index 0f41491f9..fecdab863 100644
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -74,7 +74,7 @@ def template MediaOpImmDeclare {{
}};
def template MediaOpRegConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
@@ -87,7 +87,7 @@ def template MediaOpRegConstructor {{
}};
def template MediaOpImmConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index d77e5f559..b957a164a 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -130,7 +130,7 @@ def template MicroRegOpImmDeclare {{
}};
def template MicroRegOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext) :
@@ -144,7 +144,7 @@ def template MicroRegOpConstructor {{
}};
def template MicroRegOpImmConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext) :
diff --git a/src/arch/x86/isa/microops/seqop.isa b/src/arch/x86/isa/microops/seqop.isa
index d60ddced7..72c28b1fe 100644
--- a/src/arch/x86/isa/microops/seqop.isa
+++ b/src/arch/x86/isa/microops/seqop.isa
@@ -84,7 +84,7 @@ def template SeqOpExecute {{
}};
output decoder {{
- inline SeqOpBase::SeqOpBase(
+ SeqOpBase::SeqOpBase(
ExtMachInst machInst, const char * mnemonic, const char * instMnem,
uint64_t setFlags, uint16_t _target, uint8_t _cc) :
X86MicroopBase(machInst, mnemonic, instMnem, setFlags, No_OpClass),
@@ -94,7 +94,7 @@ output decoder {{
}};
def template SeqOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
uint64_t setFlags, uint16_t _target, uint8_t _cc) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
diff --git a/src/arch/x86/isa/microops/specop.isa b/src/arch/x86/isa/microops/specop.isa
index 2f6bbd58d..a13250589 100644
--- a/src/arch/x86/isa/microops/specop.isa
+++ b/src/arch/x86/isa/microops/specop.isa
@@ -112,7 +112,7 @@ output exec {{
}};
output decoder {{
- inline MicroFaultBase::MicroFaultBase(
+ MicroFaultBase::MicroFaultBase(
ExtMachInst machInst, const char * instMnem,
uint64_t setFlags, Fault _fault, uint8_t _cc) :
X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
@@ -122,7 +122,7 @@ output decoder {{
}};
def template MicroFaultConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
Fault _fault, uint8_t _cc) :
%(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
@@ -219,7 +219,7 @@ def template MicroFenceOpDeclare {{
}};
def template MicroFenceOpConstructor {{
- inline %(class_name)s::%(class_name)s(
+ %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem, uint64_t setFlags) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
setFlags, %(op_class)s)