X86: Implement the mov to debug register intructions.

2 files changed, 12 insertions, 2 deletions

diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index edacf5bcb..f4a007282 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -352,9 +352,9 @@
                 // no prefix
                 0x0: decode OPCODE_OP_BOTTOM3 {
                     0x0: Inst::MOV(Rd,Cd);
-                    0x1: mov_Rd_Dd();
+                    0x1: Inst::MOV(Rd,Dd);
                     0x2: Inst::MOV(Cd,Rd);
-                    0x3: mov_Dd_Rd();
+                    0x3: Inst::MOV(Dd,Rd);
                     0x4: mov_Rd_Td();
                     0x6: mov_Td_Rd();
                     default: Inst::UD2();
diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 82c076216..abe44ae59 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -199,6 +199,16 @@ def macroop MOV_R_C {
     rdcr reg, regm
 };
 
+def macroop MOV_D_R {
+    .adjust_env maxOsz
+    wrdr reg, regm
+};
+
+def macroop MOV_R_D {
+    .adjust_env maxOsz
+    rddr reg, regm
+};
+
 def macroop MOV_R_S {
     rdsel reg, regm
 };