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authorGabe Black <gblack@eecs.umich.edu>2009-08-17 20:25:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-17 20:25:14 -0700
commit317a9ac6d149b724faa443f532583080567317f8 (patch)
tree859c80c966d8efcd87568a57d2c3e6e4eb7a02d3 /src/arch/x86
parent1606663aa983d69f964d26cd1522b37b772fe413 (diff)
downloadgem5-317a9ac6d149b724faa443f532583080567317f8.tar.xz
X86: Implement MOVDQ2Q.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa2
-rw-r--r--src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py5
2 files changed, 5 insertions, 2 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index c670390ad..ba150232e 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -968,7 +968,7 @@
// repne (0xF2)
0x8: decode OPCODE_OP_BOTTOM3 {
0x0: WarnUnimpl::addsubps_Vo_Wo();
- 0x6: WarnUnimpl::movdq2q_Pq_VRq();
+ 0x6: MOVDQ2Q(Pq,VRq);
default: UD2();
}
default: UD2();
diff --git a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
index ef5c49337..b4c96cd8e 100644
--- a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
@@ -78,9 +78,12 @@ def macroop MOVQ_P_XMM {
rdip t7
stfp xmml, seg, riprel, disp, dataSize=8
};
+
+def macroop MOVDQ2Q_MMX_XMM {
+ movfp mmx, xmmlm, dataSize=8
+};
'''
# MOVDQA
# MOVDQU
-# MOVDQ2Q
# MOVQ2DQ
# LDDQU