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authorNilay Vaish <nilay@cs.wisc.edu>2014-01-27 18:50:53 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-01-27 18:50:53 -0600
commit6a543b51344ef8d511f2b67fa0d657a9a78dd169 (patch)
tree1e2c3d0b4e15aec919fa49a4d9b3a085d82b5eb3 /src/arch/x86
parent5be0b846b1ca0131fc6c67c1ff7dcf64791ebc73 (diff)
downloadgem5-6a543b51344ef8d511f2b67fa0d657a9a78dd169.tar.xz
x86: implements x87 add/sub instructions
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/isa/decoder/x87.isa33
-rw-r--r--src/arch/x86/isa/insts/x87/arithmetic/addition.py59
-rw-r--r--src/arch/x86/isa/insts/x87/arithmetic/subtraction.py59
3 files changed, 137 insertions, 14 deletions
diff --git a/src/arch/x86/isa/decoder/x87.isa b/src/arch/x86/isa/decoder/x87.isa
index 61f125e7c..b325728ba 100644
--- a/src/arch/x86/isa/decoder/x87.isa
+++ b/src/arch/x86/isa/decoder/x87.isa
@@ -39,19 +39,23 @@
format WarnUnimpl {
0x1B: decode OPCODE_OP_BOTTOM3 {
- //0x0: esc0();
0x0: decode MODRM_REG {
- // ST(0) = ST(0) + 32-bit Mem
- 0x0: fadd();
+ 0x0: decode MODRM_MOD {
+ 0x3: Inst::FADD1(Eq);
+ // 32-bit memory operand
+ default: Inst::FADD1(Md);
+ }
0x1: fmul();
0x2: fcom();
0x3: fcomp();
- 0x4: fsub();
+ 0x4: decode MODRM_MOD {
+ 0x3: Inst::FSUB1(Eq);
+ default: Inst::FSUB1(Md);
+ }
0x5: fsubr();
0x6: fdiv();
0x7: fdivr();
}
- //0x1: esc1();
0x1: decode MODRM_REG {
0x0: decode MODRM_MOD {
0x3: Inst::FLD(Eq);
@@ -202,7 +206,10 @@ format WarnUnimpl {
}
//0x4: esc4();
0x4: decode MODRM_REG {
- 0x0: fadd();
+ 0x0: decode MODRM_MOD {
+ 0x3: Inst::FADD2(Eq);
+ default: Inst::FADD2(Mq);
+ }
0x1: fmul();
0x2: decode MODRM_MOD {
0x3: Inst::UD2();
@@ -214,10 +221,10 @@ format WarnUnimpl {
}
0x4: decode MODRM_MOD {
0x3: fsubr();
- default: fsub();
+ default: Inst::FSUB2(Mq);
}
0x5: decode MODRM_MOD {
- 0x3: fsub();
+ 0x3: Inst::FSUB2(Eq);
default: fsubr();
}
0x6: decode MODRM_MOD {
@@ -268,7 +275,10 @@ format WarnUnimpl {
//0x6: esc6();
0x6: decode MODRM_REG {
0x0: decode MODRM_MOD {
- 0x3: faddp();
+ 0x3: decode MODRM_RM {
+ 0x1: Inst::FADDP();
+ default: Inst::FADDP(Eq);
+ }
default: fiadd();
}
0x1: decode MODRM_MOD {
@@ -291,7 +301,10 @@ format WarnUnimpl {
default: fisub();
}
0x5: decode MODRM_MOD {
- 0x3: fsubp();
+ 0x3: decode MODRM_RM {
+ 0x1: Inst::FSUBP();
+ default: Inst::FSUBP(Eq);
+ }
default: fisubr();
}
0x6: decode MODRM_MOD {
diff --git a/src/arch/x86/isa/insts/x87/arithmetic/addition.py b/src/arch/x86/isa/insts/x87/arithmetic/addition.py
index 62d1b0fcd..a7e427c62 100644
--- a/src/arch/x86/isa/insts/x87/arithmetic/addition.py
+++ b/src/arch/x86/isa/insts/x87/arithmetic/addition.py
@@ -36,7 +36,62 @@
# Authors: Gabe Black
microcode = '''
-# FADD
-# FADDP
+def macroop FADD1_R
+{
+ addfp st(0), sti, st(0)
+};
+
+
+def macroop FADD1_M
+{
+ ldfp ufp1, seg, sib, disp
+ addfp st(0), st(0), ufp1
+};
+
+def macroop FADD1_P
+{
+ rdip t7
+ ldfp ufp1, seg, riprel, disp
+ addfp st(0), st(0), ufp1
+};
+
+def macroop FADD2_R
+{
+ addfp sti, sti, st(0)
+};
+
+def macroop FADD2_M
+{
+ ldfp ufp1, seg, sib, disp
+ addfp st(0), st(0), ufp1
+};
+
+def macroop FADD2_P
+{
+ rdip t7
+ ldfp ufp1, seg, riprel, disp
+ addfp st(0), st(0), ufp1
+};
+
+def macroop FADDP
+{
+ addfp st(1), st(0), st(1), spm=1
+};
+
+def macroop FADDP_R
+{
+ addfp sti, sti, st(0), spm=1
+};
+
+def macroop FADDP_M
+{
+ fault "new UnimpInstFault"
+};
+
+def macroop FADDP_P
+{
+ fault "new UnimpInstFault"
+};
+
# FIADD
'''
diff --git a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
index e6098ff1f..77db1e470 100644
--- a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
+++ b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
@@ -36,8 +36,63 @@
# Authors: Gabe Black
microcode = '''
-# FSUB
-# FSUBP
+def macroop FSUB1_R
+{
+ subfp st(0), st(0), sti
+};
+
+
+def macroop FSUB1_M
+{
+ ldfp ufp1, seg, sib, disp
+ subfp st(0), st(0), ufp1
+};
+
+def macroop FSUB1_P
+{
+ rdip t7
+ ldfp ufp1, seg, riprel, disp
+ subfp st(0), st(0), ufp1
+};
+
+def macroop FSUB2_R
+{
+ subfp sti, sti, st(0)
+};
+
+def macroop FSUB2_M
+{
+ ldfp ufp1, seg, sib, disp
+ subfp st(0), st(0), ufp1
+};
+
+def macroop FSUB2_P
+{
+ rdip t7
+ ldfp ufp1, seg, riprel, disp
+ subfp st(0), st(0), ufp1
+};
+
+def macroop FSUBP
+{
+ subfp st(1), st(1), st(0), spm=1
+};
+
+def macroop FSUBP_R
+{
+ subfp sti, sti, st(0), spm=1
+};
+
+def macroop FSUBP_M
+{
+ fault "new UnimpInstFault"
+};
+
+def macroop FSUBP_P
+{
+ fault "new UnimpInstFault"
+};
+
# FISUB
# FSUBR
# FSUBRP