diff options
| author | Brandon Potter <brandon.potter@amd.com> | 2017-02-23 13:27:48 -0500 |
|---|---|---|
| committer | Brandon Potter <brandon.potter@amd.com> | 2017-02-23 13:27:48 -0500 |
| commit | 748b87fc368800495e5906428bf748359d6bf19a (patch) | |
| tree | ed8d7094e32809e1e91e20ff45575557c021dab1 /src/arch/x86 | |
| parent | a4c4b4188d9d4add4ff3f2e50dd7acd1e109067a (diff) | |
| download | gem5-748b87fc368800495e5906428bf748359d6bf19a.tar.xz | |
x86: remove redundant condition check in tlb code
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/tlb.cc | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index a5e8f5524..191e91a00 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -231,13 +231,10 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const AddrRange m5opRange(0xFFFF0000, 0xFFFFFFFF); if (m5opRange.contains(paddr)) { - if (m5opRange.contains(paddr)) { - req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR | - Request::STRICT_ORDER); - req->setPaddr(GenericISA::iprAddressPseudoInst( - (paddr >> 8) & 0xFF, - paddr & 0xFF)); - } + req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR | + Request::STRICT_ORDER); + req->setPaddr(GenericISA::iprAddressPseudoInst((paddr >> 8) & 0xFF, + paddr & 0xFF)); } else if (FullSystem) { // Check for an access to the local APIC LocalApicBase localApicBase = |