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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-04 16:27:04 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-27 16:00:28 +0000
commit5187a24d496cd16bfe440f52ff0c45ab0e185306 (patch)
treec491ebdad23a5f9e57ef62ffeabcf2b87289f5ce /src/arch
parent685cf2d1f8ae2f2ca3168a650efa1d36120783fe (diff)
downloadgem5-5187a24d496cd16bfe440f52ff0c45ab0e185306.tar.xz
sim,cpu,mem,arch: Introduced MasterInfo data structure
With this patch a gem5 System will store more info about its Masters. While it was previously keeping track of the Master name and Master ID only, it is now adding a per-Master pointer to the SimObject related to the Master. This will make it possible for a client to query a System for a Master using either the master's name or the master's pointer. Change-Id: I8b97d328a65cd06f329e2cdd3679451c17d2b8f6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9781 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/stage2_mmu.cc2
-rw-r--r--src/arch/x86/pagetable_walker.hh2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc
index 5c28d073e..ba820e339 100644
--- a/src/arch/arm/stage2_mmu.cc
+++ b/src/arch/arm/stage2_mmu.cc
@@ -51,7 +51,7 @@ using namespace ArmISA;
Stage2MMU::Stage2MMU(const Params *p)
: SimObject(p), _stage1Tlb(p->tlb), _stage2Tlb(p->stage2_tlb),
port(_stage1Tlb->getTableWalker(), p->sys),
- masterId(p->sys->getMasterId(_stage1Tlb->getTableWalker()->name()))
+ masterId(p->sys->getMasterId(_stage1Tlb->getTableWalker()))
{
// we use the stage-one table walker as the parent of the port,
// and to get our master id, this is done to keep things
diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh
index d71db7ea3..d5aa631d2 100644
--- a/src/arch/x86/pagetable_walker.hh
+++ b/src/arch/x86/pagetable_walker.hh
@@ -203,7 +203,7 @@ namespace X86ISA
Walker(const Params *params) :
MemObject(params), port(name() + ".port", this),
funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system),
- masterId(sys->getMasterId(name())),
+ masterId(sys->getMasterId(this)),
numSquashable(params->num_squash_per_cycle),
startWalkWrapperEvent([this]{ startWalkWrapper(); }, name())
{