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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
commit | a2d8dcebbac005fca3728c5df45897d932d93af5 (patch) | |
tree | b46780d9dee8d00302d9956fb3ee0a6f3fb0563b /src/arch | |
parent | 952253483b85bee25f8ef23cc147fade2bf0c00f (diff) | |
download | gem5-a2d8dcebbac005fca3728c5df45897d932d93af5.tar.xz |
ARM: Decode the ldrex instruction.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/arm/isa/formats/mem.isa | 36 |
1 files changed, 30 insertions, 6 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa index 209f62af4..6b36e39fb 100644 --- a/src/arch/arm/isa/formats/mem.isa +++ b/src/arch/arm/isa/formats/mem.isa @@ -227,12 +227,28 @@ def format ArmSyncMem() {{ case 0x18: return new WarnUnimplemented("strex", machInst); case 0x19: - return new WarnUnimplemented("ldrex", machInst); + return new %(ldrex)s(machInst, rt, rn, true, 0); + case 0x1a: + return new WarnUnimplemented("strexd", machInst); + case 0x1b: + return new WarnUnimplemented("ldrexd", machInst); + case 0x1c: + return new WarnUnimplemented("strexb", machInst); + case 0x1d: + return new %(ldrexb)s(machInst, rt, rn, true, 0); + case 0x1e: + return new WarnUnimplemented("strexh", machInst); + case 0x1f: + return new %(ldrexh)s(machInst, rt, rn, true, 0); default: return new Unknown(machInst); } } - ''' + ''' % { + "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4), + "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1), + "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2) + } }}; def format Thumb32LdrStrDExTbh() {{ @@ -242,12 +258,16 @@ def format Thumb32LdrStrDExTbh() {{ const uint32_t op2 = bits(machInst, 21, 20); const uint32_t op3 = bits(machInst, 7, 4); const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16); + const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12); + /* This isn't used yet, and that makes gcc upset. */ + //const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 11, 8); if (bits(op1, 1) == 0 && bits(op2, 1) == 0) { if (op1 == 0) { + const uint32_t imm = bits(machInst, 7, 0) << 2; if (op2 == 0) { return new WarnUnimplemented("strex", machInst); } else { - return new WarnUnimplemented("ldrex", machInst); + return new %(ldrex)s(machInst, rt, rn, true, imm); } } else { if (op2 == 0) { @@ -268,9 +288,9 @@ def format Thumb32LdrStrDExTbh() {{ case 0x1: return new WarnUnimplemented("tbh", machInst); case 0x4: - return new WarnUnimplemented("ldrexb", machInst); + return new %(ldrexb)s(machInst, rt, rn, true, 0); case 0x5: - return new WarnUnimplemented("ldrexh", machInst); + return new %(ldrexh)s(machInst, rt, rn, true, 0); case 0x7: return new WarnUnimplemented("ldrexd", machInst); default: @@ -286,7 +306,11 @@ def format Thumb32LdrStrDExTbh() {{ } } } - ''' + ''' % { + "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4), + "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1), + "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2) + } }}; def format Thumb32LoadWord() {{ |