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author | Gabe Black <gabeblack@google.com> | 2019-08-14 15:35:48 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2019-08-16 01:05:01 +0000 |
commit | c7f18da6b04bb757bace18f22542c8078ba1b7b2 (patch) | |
tree | ec4d8ff4a5bc53aef58b411d41edeec2489860de /src/arch | |
parent | 023aca7755dc2f376102b28022ea3fe6a5141340 (diff) | |
download | gem5-c7f18da6b04bb757bace18f22542c8078ba1b7b2.tar.xz |
x86: Stop CPUID from claiming we support xsave.
xsave is a fairly complex feature which we don't support in gem5, but
we do report that we support it through CPUID. It looks like I confused
it with FXSAVE which is an instruction related to SSE. This change
turns that bit back off again.
Change-Id: I00fc79168c5f7095b5241e870a4c8782e4385425
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20169
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/cpuid.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc index 867087eb0..e6a898a08 100644 --- a/src/arch/x86/cpuid.cc +++ b/src/arch/x86/cpuid.cc @@ -162,7 +162,7 @@ namespace X86ISA { break; case FamilyModelStepping: result = CpuidResult(0x00020f51, 0x00000805, - 0xe7dbfbff, 0x04000209); + 0xe7dbfbff, 0x00000209); break; case ExtendedFeatures: result = CpuidResult(0x00000000, 0x01800000, |