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authorGabe Black <gblack@eecs.umich.edu>2007-07-30 13:23:33 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-30 13:23:33 -0700
commitd8beeff324f0d47927716e0081fe4a72c56601f7 (patch)
treea3eb9393a591cf73d88f98beb8076c3f3106bc75 /src/arch
parent9b5421dcbabb3e085edca359d8ce29978594dd98 (diff)
downloadgem5-d8beeff324f0d47927716e0081fe4a72c56601f7.tar.xz
X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".
--HG-- extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/insts/microldstop.cc6
-rw-r--r--src/arch/x86/insts/microldstop.hh7
-rw-r--r--src/arch/x86/insts/microregop.cc10
-rw-r--r--src/arch/x86/insts/microregop.hh2
-rw-r--r--src/arch/x86/isa/microops/limmop.isa4
5 files changed, 19 insertions, 10 deletions
diff --git a/src/arch/x86/insts/microldstop.cc b/src/arch/x86/insts/microldstop.cc
index 8a52ad932..9628256e4 100644
--- a/src/arch/x86/insts/microldstop.cc
+++ b/src/arch/x86/insts/microldstop.cc
@@ -66,13 +66,13 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, data, dataSize);
+ printDestReg(response, 0, dataSize);
response << ", ";
printSegment(response, segment);
ccprintf(response, ":[%d*", scale);
- printReg(response, index, addressSize);
+ printSrcReg(response, 0, addressSize);
response << " + ";
- printReg(response, base, addressSize);
+ printSrcReg(response, 1, addressSize);
ccprintf(response, " + %#x]", disp);
return response.str();
}
diff --git a/src/arch/x86/insts/microldstop.hh b/src/arch/x86/insts/microldstop.hh
index ae03d176e..8fef14121 100644
--- a/src/arch/x86/insts/microldstop.hh
+++ b/src/arch/x86/insts/microldstop.hh
@@ -76,6 +76,7 @@ namespace X86ISA
const RegIndex data;
const uint8_t dataSize;
const uint8_t addressSize;
+ RegIndex foldOBit, foldABit;
//Constructor
LdStOp(ExtMachInst _machInst,
@@ -92,7 +93,11 @@ namespace X86ISA
disp(_disp), segment(_segment),
data(_data),
dataSize(_dataSize), addressSize(_addressSize)
- {}
+ {
+ foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
+ foldABit =
+ (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
+ }
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc
index 976b04688..e67a82d4f 100644
--- a/src/arch/x86/insts/microregop.cc
+++ b/src/arch/x86/insts/microregop.cc
@@ -173,11 +173,11 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest, dataSize);
+ printDestReg(response, 0, dataSize);
response << ", ";
- printReg(response, src1, dataSize);
+ printSrcReg(response, 0, dataSize);
response << ", ";
- printReg(response, src2, dataSize);
+ printSrcReg(response, 1, dataSize);
return response.str();
}
@@ -187,9 +187,9 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest, dataSize);
+ printDestReg(response, 0, dataSize);
response << ", ";
- printReg(response, src1, dataSize);
+ printSrcReg(response, 0, dataSize);
ccprintf(response, ", %#x", imm8);
return response.str();
}
diff --git a/src/arch/x86/insts/microregop.hh b/src/arch/x86/insts/microregop.hh
index f411c0775..f465ac651 100644
--- a/src/arch/x86/insts/microregop.hh
+++ b/src/arch/x86/insts/microregop.hh
@@ -113,6 +113,7 @@ namespace X86ISA
const RegIndex dest;
const uint8_t dataSize;
const uint16_t ext;
+ RegIndex foldOBit;
// Constructor
RegOpBase(ExtMachInst _machInst,
@@ -128,6 +129,7 @@ namespace X86ISA
src1(_src1), dest(_dest),
dataSize(_dataSize), ext(_ext)
{
+ foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
}
//Figure out what the condition code flags should be.
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index ec68c36dc..c357c1d6c 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -78,6 +78,7 @@ def template MicroLimmOpDeclare {{
const RegIndex dest;
const uint64_t imm;
const uint8_t dataSize;
+ RegIndex foldOBit;
void buildMe();
std::string generateDisassembly(Addr pc,
@@ -104,7 +105,7 @@ def template MicroLimmOpDisassembly {{
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest, dataSize);
+ printDestReg(response, 0, dataSize);
response << ", ";
ccprintf(response, "%#x", imm);
return response.str();
@@ -115,6 +116,7 @@ def template MicroLimmOpConstructor {{
inline void %(class_name)s::buildMe()
{
+ foldOBit = (dataSize == 1 && !machInst.rex.present) ? 1 << 6 : 0;
%(constructor)s;
}