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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 02:16:49 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 02:16:49 -0700
commitf668340f2cda609d263d47b8a00c5b138e8c499f (patch)
tree47836abf3a4354f0c9d3aebea3ee5cfc7cf185d0 /src/arch
parent79a3a6aecb2f92bc3faf96881f92fa5fb7dbbe4f (diff)
downloadgem5-f668340f2cda609d263d47b8a00c5b138e8c499f.tar.xz
X86: Set the local APIC ID to something meaningful.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/interrupts.cc51
-rw-r--r--src/arch/x86/interrupts.hh38
2 files changed, 54 insertions, 35 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 30c532c2b..0603069a7 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -286,10 +286,20 @@ X86ISA::Interrupts::requestInterrupt(uint8_t vector,
cpu->wakeup();
}
+
+void
+X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
+{
+ cpu = newCPU;
+ assert(cpu);
+ regs[APIC_ID] = (cpu->cpuId() << 24);
+}
+
+
Tick
X86ISA::Interrupts::recvMessage(PacketPtr pkt)
{
- uint8_t id = 0;
+ uint8_t id = (regs[APIC_ID] >> 24);
Addr offset = pkt->getAddr() - x86InterruptAddress(id, 0);
assert(pkt->cmd == MemCmd::MessageReq);
switch(offset)
@@ -319,6 +329,26 @@ X86ISA::Interrupts::recvMessage(PacketPtr pkt)
}
+void
+X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
+{
+ uint8_t id = (regs[APIC_ID] >> 24);
+ range_list.clear();
+ range_list.push_back(RangeEx(x86LocalAPICAddress(id, 0),
+ x86LocalAPICAddress(id, 0) + PageBytes));
+}
+
+
+void
+X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
+{
+ uint8_t id = (regs[APIC_ID] >> 24);
+ range_list.clear();
+ range_list.push_back(RangeEx(x86InterruptAddress(id, 0),
+ x86InterruptAddress(id, 0) + PhysAddrAPICRangeSize));
+}
+
+
uint32_t
X86ISA::Interrupts::readReg(ApicRegIndex reg)
{
@@ -479,6 +509,25 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val)
return;
}
+
+X86ISA::Interrupts::Interrupts(Params * p) :
+ BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
+ apicTimerEvent(this),
+ pendingSmi(false), smiVector(0),
+ pendingNmi(false), nmiVector(0),
+ pendingExtInt(false), extIntVector(0),
+ pendingInit(false), initVector(0),
+ pendingUnmaskableInt(false)
+{
+ pioSize = PageBytes;
+ memset(regs, 0, sizeof(regs));
+ //Set the local apic DFR to the flat model.
+ regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
+ ISRV = 0;
+ IRRV = 0;
+}
+
+
bool
X86ISA::Interrupts::checkInterrupts(ThreadContext *tc) const
{
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh
index c5e3bde0d..34ea992d1 100644
--- a/src/arch/x86/interrupts.hh
+++ b/src/arch/x86/interrupts.hh
@@ -191,11 +191,7 @@ class Interrupts : public BasicPioDevice, IntDev
*/
typedef X86LocalApicParams Params;
- void
- setCPU(BaseCPU * newCPU)
- {
- cpu = newCPU;
- }
+ void setCPU(BaseCPU * newCPU);
void
setClock(Tick newClock)
@@ -225,19 +221,8 @@ class Interrupts : public BasicPioDevice, IntDev
return entry.periodic;
}
- void addressRanges(AddrRangeList &range_list)
- {
- range_list.clear();
- range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0),
- x86LocalAPICAddress(0, 0) + PageBytes));
- }
-
- void getIntAddrRange(AddrRangeList &range_list)
- {
- range_list.clear();
- range_list.push_back(RangeEx(x86InterruptAddress(0, 0),
- x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize));
- }
+ void addressRanges(AddrRangeList &range_list);
+ void getIntAddrRange(AddrRangeList &range_list);
Port *getPort(const std::string &if_name, int idx = -1)
{
@@ -262,22 +247,7 @@ class Interrupts : public BasicPioDevice, IntDev
* Constructor.
*/
- Interrupts(Params * p)
- : BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
- apicTimerEvent(this),
- pendingSmi(false), smiVector(0),
- pendingNmi(false), nmiVector(0),
- pendingExtInt(false), extIntVector(0),
- pendingInit(false), initVector(0),
- pendingUnmaskableInt(false)
- {
- pioSize = PageBytes;
- memset(regs, 0, sizeof(regs));
- //Set the local apic DFR to the flat model.
- regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
- ISRV = 0;
- IRRV = 0;
- }
+ Interrupts(Params * p);
/*
* Functions for retrieving interrupts for the CPU to handle.