LSQ: Only trigger a memory violation with a load/load if the value changes.

Only create a memory ordering violation when the value could have changed
between two subsequent loads, instead of just when loads go out-of-order
to the same address. While not very common in the case of Alpha, with
an architecture with a hardware table walker this can happen reasonably
frequently beacuse a translation will miss and start a table walk and
before the CPU re-schedules the faulting instruction another one will
pass it to the same address (or cache block depending on the dendency
checking).

This patch has been tested with a couple of self-checking hand crafted
programs to stress ordering between two cores.

The performance improvement on SPEC benchmarks can be substantial (2-10%).

2 files changed, 0 insertions, 24 deletions

diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 3c361404e..68c5fa0e8 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -75,9 +75,6 @@ template<> ArmFault::FaultVals ArmFaultVals<FastInterrupt>::vals =
 template<> ArmFault::FaultVals ArmFaultVals<FlushPipe>::vals =
     {"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values
 
-template<> ArmFault::FaultVals ArmFaultVals<ReExec>::vals =
-    {"ReExec Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values
-
 template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals =
     {"ArmSev Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values
 Addr 
@@ -240,17 +237,6 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
     tc->pcState(pc);
 }
 
-void
-ReExec::invoke(ThreadContext *tc, StaticInstPtr inst) {
-    DPRINTF(Faults, "Invoking ReExec Fault\n");
-
-    // Set the PC to then the faulting instruction.
-    // Net effect is simply squashing all instructions including this
-    // instruction and refetching/rexecuting current instruction
-    PCState pc = tc->pcState();
-    tc->pcState(pc);
-}
-
 template void AbortFault<PrefetchAbort>::invoke(ThreadContext *tc,
                                                 StaticInstPtr inst);
 template void AbortFault<DataAbort>::invoke(ThreadContext *tc,
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 54edb336b..fe1258a16 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -242,16 +242,6 @@ class FlushPipe : public ArmFaultVals<FlushPipe>
             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 };
 
-// A fault that flushes the pipe, including the faulting instructions
-class ReExec : public ArmFaultVals<ReExec>
-{
-  public:
-    ReExec() {}
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
-};
-
-
 static inline Fault genMachineCheckFault()
 {
     return new Reset();