summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorDylan Johnson <Dylan.Johnson@ARM.com>2016-08-02 10:38:02 +0100
committerDylan Johnson <Dylan.Johnson@ARM.com>2016-08-02 10:38:02 +0100
commit996c1ed33c251f80ebdfd972477709f95bdcbe65 (patch)
treef8bc3a721badae2896a9fe2f31bdf191e8b6dd86 /src/arch
parenteac27759e77edfcb772021be714469f43f2e3b46 (diff)
downloadgem5-996c1ed33c251f80ebdfd972477709f95bdcbe65.tar.xz
arm: Fix stage 2 determination in table walker
We recompute if we are doing a stage 2 walk inside of the table walker but we have already figured it out in the tlb. Pass the information in to the walk instead of recomputing it. Change-Id: I39637ce99309b2ddbc30344d45ac9ebf6a203401
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/table_walker.cc7
-rw-r--r--src/arch/arm/table_walker.hh4
-rw-r--r--src/arch/arm/tlb.cc2
3 files changed, 7 insertions, 6 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index f1a7ca250..1c1f70599 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -181,7 +181,8 @@ Fault
TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint16_t _asid,
uint8_t _vmid, bool _isHyp, TLB::Mode _mode,
TLB::Translation *_trans, bool _timing, bool _functional,
- bool secure, TLB::ArmTranslationType tranType)
+ bool secure, TLB::ArmTranslationType tranType,
+ bool _stage2Req)
{
assert(!(_functional && _timing));
++statWalks;
@@ -292,9 +293,9 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint16_t _asid,
// We only do a second stage of translation if we're not secure, or in
// hyp mode, the second stage MMU is enabled, and this table walker
// instance is the first stage.
+ // TODO: fix setting of doingStage2 for timing mode
currState->doingStage2 = false;
- currState->stage2Req = currState->hcr.vm && !isStage2 &&
- !currState->isSecure && !currState->isHyp;
+ currState->stage2Req = _stage2Req && !isStage2;
bool long_desc_format = currState->aarch64 || _isHyp || isStage2 ||
longDescFormatInUse(currState->tc);
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 743b8aa93..e3c7d33d7 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2015 ARM Limited
+ * Copyright (c) 2010-2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -902,7 +902,7 @@ class TableWalker : public MemObject
Fault walk(RequestPtr req, ThreadContext *tc, uint16_t asid, uint8_t _vmid,
bool _isHyp, TLB::Mode mode, TLB::Translation *_trans,
bool timing, bool functional, bool secure,
- TLB::ArmTranslationType tranType);
+ TLB::ArmTranslationType tranType, bool _stage2Req);
void setTlb(TLB *_tlb) { tlb = _tlb; }
TLB* getTlb() { return tlb; }
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 536fa51cd..9a44b1b58 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1384,7 +1384,7 @@ TLB::getTE(TlbEntry **te, RequestPtr req, ThreadContext *tc, Mode mode,
Fault fault;
fault = tableWalker->walk(req, tc, asid, vmid, isHyp, mode,
translation, timing, functional, is_secure,
- tranType);
+ tranType, stage2Req);
// for timing mode, return and wait for table walk,
if (timing || fault != NoFault) {
return fault;