diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-19 06:35:04 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-19 06:35:04 -0400 |
commit | adb862103138caf11191da50d34eb4c93295633a (patch) | |
tree | 92002abd45eed9456400eafaad7d6b757d1297b9 /src/arch | |
parent | a444a6f8d666f7922460dc0fe75877680fd23546 (diff) | |
download | gem5-adb862103138caf11191da50d34eb4c93295633a.tar.xz |
clang: Fix recently introduced clang compilation errors
This patch makes the code compile with clang 2.9 and 3.0 again by
making two very minor changes. Firt, it maintains a strict typing in
the forward declaration of the BaseCPUParams. Second, it adds a
FullSystemInt flag of the type unsigned int next to the boolean
FullSystem flag. The FullSystemInt variable can be used in
decode-statements (expands to switch statements) in the instruction
decoder.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/alpha/isa/decoder.isa | 6 | ||||
-rw-r--r-- | src/arch/mips/isa/decoder.isa | 4 | ||||
-rw-r--r-- | src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 | ||||
-rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index 4bbf83cce..9785e217c 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -805,14 +805,14 @@ decode OPCODE default Unknown::unknown() { 0x4400: wmb({{ }}, IsWriteBarrier, MemWriteOp); } - 0xe000: decode FullSystem { + 0xe000: decode FullSystemInt { 0: FailUnimpl::rc_se(); default: BasicOperate::rc({{ Ra = IntrFlag; IntrFlag = 0; }}, IsNonSpeculative, IsUnverifiable); } - 0xf000: decode FullSystem { + 0xf000: decode FullSystemInt { 0: FailUnimpl::rs_se(); default: BasicOperate::rs({{ Ra = IntrFlag; @@ -821,7 +821,7 @@ decode OPCODE default Unknown::unknown() { } } - 0x00: decode FullSystem { + 0x00: decode FullSystemInt { 0: decode PALFUNC { format EmulatedCallPal { 0x00: halt ({{ diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index 034133f96..1091e67a0 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -163,7 +163,7 @@ decode OPCODE_HI default Unknown::unknown() { format BasicOp { 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); - 0x4: decode FullSystem { + 0x4: decode FullSystemInt { 0: syscall_se({{ xc->syscall(R2); }}, IsSerializeAfter, IsNonSpeculative); default: syscall({{ fault = new SystemCallFault(); }}); @@ -2431,7 +2431,7 @@ decode OPCODE_HI default Unknown::unknown() { } } 0x3: decode OP default FailUnimpl::rdhwr() { - 0x0: decode FullSystem { + 0x0: decode FullSystemInt { 0: decode RD { 29: BasicOp::rdhwr_se({{ Rt = TpValue; }}); } diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 4ebf23032..66a0c8c46 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -394,7 +394,7 @@ default: Inst::RET_FAR(); } 0x4: int3(); - 0x5: decode FullSystem default int_Ib() { + 0x5: decode FullSystemInt default int_Ib() { 0: decode IMMEDIATE { // Really only the LSB matters, but the predecoder // will sign extend it, and there's no easy way to diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 030e36404..378d426e3 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -216,7 +216,7 @@ default: Inst::UD2(); } } - 0x05: decode FullSystem { + 0x05: decode FullSystemInt { 0: SyscallInst::syscall('xc->syscall(Rax)', IsSyscall, IsNonSpeculative, IsSerializeAfter); default: decode MODE_MODE { @@ -398,7 +398,7 @@ 0x1: Inst::RDTSC(); 0x2: Inst::RDMSR(); 0x3: rdpmc(); - 0x4: decode FullSystem { + 0x4: decode FullSystemInt { 0: SyscallInst::sysenter('xc->syscall(Rax)', IsSyscall, IsNonSpeculative, IsSerializeAfter); default: sysenter(); |