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author | Anthony Gutierrez <atgutier@umich.edu> | 2012-06-05 14:20:13 -0400 |
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committer | Anthony Gutierrez <atgutier@umich.edu> | 2012-06-05 14:20:13 -0400 |
commit | d6da3ff3175c54ba904f6e561bd4b23f52ddf84d (patch) | |
tree | e61bae4a2df3caccfd1dfb6a8d375952388b4f44 /src/arch | |
parent | 20d25b9da77cc681ef7d5bb101438bc0b0c6827c (diff) | |
download | gem5-d6da3ff3175c54ba904f6e561bd4b23f52ddf84d.tar.xz |
cpu: Don't init simple and inorder CPUs if they are defered.
initCPU() will be called to initialize switched out CPUs for the simple and
inorder CPU models. this patch prevents those CPUs from being initialized
because they should get their state from the active CPU when it is switched
out.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/arm/utility.cc | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 28ffb6896..71ad21e1e 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -47,7 +47,6 @@ #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "mem/fs_translating_port_proxy.hh" -#include "params/BaseCPU.hh" #include "sim/full_system.hh" namespace ArmISA { @@ -56,10 +55,8 @@ void initCPU(ThreadContext *tc, int cpuId) { // Reset CP15?? What does that mean -- ali - + // FPEXC.EN = 0 - if (tc->getCpuPtr()->params()->defer_registration) - return; static Fault reset = new Reset; reset->invoke(tc); |