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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:15:27 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:15:27 -0700 |
| commit | 6f3bb03a3fff61de8c8dc53b01d9b48186021d21 (patch) | |
| tree | 9407e437183056780920a508032413012d85eb1c /src/arch | |
| parent | e410a925df8d37f386c97dc7cdd9a78347ce4700 (diff) | |
| download | gem5-6f3bb03a3fff61de8c8dc53b01d9b48186021d21.tar.xz | |
X86: Implement the cmpxchg instruction.
--HG--
extra : convert_revision : b9e172bcb9551edf65c63f26dfa07d771edf3e1e
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 | ||||
| -rw-r--r-- | src/arch/x86/isa/insts/semaphores.py | 27 |
2 files changed, 28 insertions, 3 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index e8307c6e6..f2d8a972e 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -329,8 +329,8 @@ 0x7: Inst::IMUL(Gv,Ev); } 0x16: decode OPCODE_OP_BOTTOM3 { - 0x0: cmpxchg_Eb_Gb(); - 0x1: cmpxchg_Ev_Gv(); + 0x0: Inst::CMPXCHG(Eb,Gb); + 0x1: Inst::CMPXCHG(Ev,Gv); 0x2: lss_Gz_Mp(); 0x3: btr_Ev_Gv(); 0x4: lfs_Gz_Mp(); diff --git a/src/arch/x86/isa/insts/semaphores.py b/src/arch/x86/isa/insts/semaphores.py index 32f28cf82..882213a3f 100644 --- a/src/arch/x86/isa/insts/semaphores.py +++ b/src/arch/x86/isa/insts/semaphores.py @@ -53,7 +53,32 @@ # # Authors: Gabe Black -microcode = "" +microcode = ''' +def macroop CMPXCHG_R_R { + sub t0, rax, reg, flags=(OF, SF, ZF, AF, PF, CF) + mov reg, reg, regm, flags=(CZF,) + mov rax, rax, reg, flags=(nCZF,) +}; + +def macroop CMPXCHG_M_R { + ld t1, seg, sib, disp + sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF) + + mov t1, t1, reg, flags=(CZF,) + st t1, seg, sib, disp + mov rax, rax, t1, flags=(nCZF,) +}; + +def macroop CMPXCHG_P_R { + rdip t7 + ld t1, seg, riprel, disp + sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF) + + mov t1, t1, reg, flags=(CZF,) + st t1, seg, riprel, disp + mov rax, rax, t1, flags=(nCZF,) +}; +''' #let {{ # class CMPXCHG(Inst): # "GenFault ${new UnimpInstFault}" |