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authorAli Saidi <Ali.Saidi@ARM.com>2011-03-17 19:20:19 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-03-17 19:20:19 -0500
commit799c3da8d0086bfdfbae532e05018828387e4497 (patch)
treea2922f9bcac507ff8e4031a060c825de1ad707d2 /src/arch
parent30143baf7e35a73acaff1d02cf71278248a86515 (diff)
downloadgem5-799c3da8d0086bfdfbae532e05018828387e4497.tar.xz
O3: Send instruction back to fetch on squash to seed predecoder correctly.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/predecoder.hh6
-rw-r--r--src/arch/arm/predecoder.hh6
-rw-r--r--src/arch/mips/predecoder.hh6
-rw-r--r--src/arch/power/predecoder.hh6
-rw-r--r--src/arch/sparc/predecoder.hh7
-rw-r--r--src/arch/x86/predecoder.hh6
6 files changed, 37 insertions, 0 deletions
diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh
index a8788051f..2f8c4c2ef 100644
--- a/src/arch/alpha/predecoder.hh
+++ b/src/arch/alpha/predecoder.hh
@@ -76,6 +76,12 @@ class Predecoder
emiIsReady = false;
}
+ void
+ reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ }
+
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
diff --git a/src/arch/arm/predecoder.hh b/src/arch/arm/predecoder.hh
index a99e38ce7..511bc29bc 100644
--- a/src/arch/arm/predecoder.hh
+++ b/src/arch/arm/predecoder.hh
@@ -83,6 +83,12 @@ namespace ArmISA
predAddrValid = false;
}
+ void reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ itstate = old_emi.newItstate;
+ }
+
Predecoder(ThreadContext * _tc) :
tc(_tc), data(0)
{
diff --git a/src/arch/mips/predecoder.hh b/src/arch/mips/predecoder.hh
index 4220b768c..110493cc5 100644
--- a/src/arch/mips/predecoder.hh
+++ b/src/arch/mips/predecoder.hh
@@ -75,6 +75,12 @@ class Predecoder
emiIsReady = false;
}
+ void
+ reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ }
+
//Use this to give data to the predecoder. This should be used
//when there is control flow.
void
diff --git a/src/arch/power/predecoder.hh b/src/arch/power/predecoder.hh
index 8b1089095..c10bc51bf 100644
--- a/src/arch/power/predecoder.hh
+++ b/src/arch/power/predecoder.hh
@@ -82,6 +82,12 @@ class Predecoder
emiIsReady = false;
}
+ void
+ reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ }
+
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
diff --git a/src/arch/sparc/predecoder.hh b/src/arch/sparc/predecoder.hh
index 670c547d0..082adeb72 100644
--- a/src/arch/sparc/predecoder.hh
+++ b/src/arch/sparc/predecoder.hh
@@ -68,12 +68,19 @@ class Predecoder
}
void process() {}
+
void
reset()
{
emiIsReady = false;
}
+ void
+ reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ }
+
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
diff --git a/src/arch/x86/predecoder.hh b/src/arch/x86/predecoder.hh
index 5c67e28e1..790453b98 100644
--- a/src/arch/x86/predecoder.hh
+++ b/src/arch/x86/predecoder.hh
@@ -174,6 +174,12 @@ namespace X86ISA
state = ResetState;
}
+ void
+ reset(const ExtMachInst &old_emi)
+ {
+ reset();
+ }
+
ThreadContext * getTC()
{
return tc;