summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorKevin Lim <ktlim@umich.edu>2006-07-06 17:53:26 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-06 17:53:26 -0400
commite7ccc94ea3cdc6130e66899fd905ca11da958727 (patch)
tree54ba918680288ad22516b26cc6b99ad4dddb0d6b /src/arch
parent8bf9709d912849a33c44cf3cd004a288d2106176 (diff)
downloadgem5-e7ccc94ea3cdc6130e66899fd905ca11da958727.tar.xz
Various serialization changes to make it possible for the O3CPU to checkpoint.
src/arch/alpha/regfile.hh: Define serialize/unserialize functions on MiscRegFile itself. src/cpu/o3/regfile.hh: Remove old commented code. src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: Push common serialization code to ThreadState level. Also allow the SimpleThread to be used for checkpointing by other models. src/cpu/thread_state.cc: src/cpu/thread_state.hh: Move common serialization code into ThreadState. --HG-- extra : convert_revision : ef64ef515355437439af967eda2e610e8c1b658b
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/regfile.hh4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh
index 1025412cd..9ecad6f42 100644
--- a/src/arch/alpha/regfile.hh
+++ b/src/arch/alpha/regfile.hh
@@ -112,6 +112,10 @@ namespace AlphaISA
lock_flag = 0;
lock_addr = 0;
}
+
+ void serialize(std::ostream &os);
+
+ void unserialize(Checkpoint *cp, const std::string &section);
#if FULL_SYSTEM
protected:
typedef uint64_t InternalProcReg;