arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.

Neither assert(0) nor assert(false) give any hint as to why control
getting to them is bad, and their more descriptive versions,
assert(0 && "description") and assert(false && "description"), jury
rig assert to add an error message when the utility function panic()
already does that directly with better formatting options.

This change replaces that flavor of call to assert with panic, except
in the actual code which processes the formatting that panic uses (to
avoid infinitely recurring error handling), and in some *.sm files
since I don't know what rules those have to follow and don't want to
accidentaly break them.

Change-Id: I8addfbfaf77eaed94ec8191f2ae4efb477cefdd0
Reviewed-on: https://gem5-review.googlesource.com/c/14636
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

3 files changed, 11 insertions, 11 deletions

diff --git a/src/arch/arm/insts/fplib.cc b/src/arch/arm/insts/fplib.cc
index 8ef127781..49305ecf2 100644
--- a/src/arch/arm/insts/fplib.cc
+++ b/src/arch/arm/insts/fplib.cc
@@ -42,6 +42,7 @@
 
 #include <cassert>
 
+#include "base/logging.hh"
 #include "fplib.hh"
 
 namespace ArmISA
@@ -3740,7 +3741,7 @@ fplibRecipEstimate(uint16_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp16_infinity(sgn) : fp16_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -3802,7 +3803,7 @@ fplibRecipEstimate(uint32_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp32_infinity(sgn) : fp32_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -3864,7 +3865,7 @@ fplibRecipEstimate(uint64_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp64_infinity(sgn) : fp64_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -4108,7 +4109,7 @@ fplibRoundInt(uint16_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4173,7 +4174,7 @@ fplibRoundInt(uint32_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4238,7 +4239,7 @@ fplibRoundInt(uint64_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4575,7 +4576,7 @@ FPToFixed_64(int sgn, int exp, uint64_t mnt, bool u, FPRounding rounding,
         x += err >> 1;
         break;
       default:
-        assert(0);
+        panic("Unrecognized FP rounding mode");
     }
 
     if (u ? sgn && x : x > (1ULL << (FP64_BITS - 1)) - !sgn) {
diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh
index 62d1c09ab..38ff8adea 100644
--- a/src/arch/arm/insts/pred_inst.hh
+++ b/src/arch/arm/insts/pred_inst.hh
@@ -43,6 +43,7 @@
 #define __ARCH_ARM_INSTS_PREDINST_HH__
 
 #include "arch/arm/insts/static_inst.hh"
+#include "base/logging.hh"
 #include "base/trace.hh"
 
 namespace ArmISA
@@ -186,7 +187,7 @@ vfp_modified_imm(uint8_t data, FpDataType dtype)
                   (bits(bigData, 7) << 63);
         break;
       default:
-        assert(0);
+        panic("Unrecognized FP data type");
     }
     return bigData;
 }
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index a2710fb90..e2204db6f 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -121,9 +121,7 @@ output exec {{
             return packet->getLE<uint64_t>();
 
           default:
-            std::cerr << "bad store data size = " << packet->getSize() << std::endl;
-
-            assert(0);
+            panic("bad store data size = %d", packet->getSize());
             return 0;
         }
     }