Spelling: Fix the a spelling error by changing mmaped to mmapped.

There may not be a formally correct spelling for the past tense of mmap, but
mmapped is the spelling Google doesn't try to autocorrect. This makes sense
because it mirrors the past tense of map->mapped and not the past tense of
cape->caped.

--HG--
rename : src/arch/alpha/mmaped_ipr.hh => src/arch/alpha/mmapped_ipr.hh
rename : src/arch/arm/mmaped_ipr.hh => src/arch/arm/mmapped_ipr.hh
rename : src/arch/mips/mmaped_ipr.hh => src/arch/mips/mmapped_ipr.hh
rename : src/arch/power/mmaped_ipr.hh => src/arch/power/mmapped_ipr.hh
rename : src/arch/sparc/mmaped_ipr.hh => src/arch/sparc/mmapped_ipr.hh
rename : src/arch/x86/mmaped_ipr.hh => src/arch/x86/mmapped_ipr.hh

9 files changed, 19 insertions, 19 deletions

diff --git a/src/arch/SConscript b/src/arch/SConscript
index 8c537182d..34367b274 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -50,7 +50,7 @@ isa_switch_hdrs = Split('''
         kernel_stats.hh
         locked_mem.hh
         microcode_rom.hh
-        mmaped_ipr.hh
+        mmapped_ipr.hh
         mt.hh
         process.hh
         predecoder.hh
diff --git a/src/arch/alpha/mmaped_ipr.hh b/src/arch/alpha/mmapped_ipr.hh
index 99f8aeb06..6c3403b33 100644
--- a/src/arch/alpha/mmaped_ipr.hh
+++ b/src/arch/alpha/mmapped_ipr.hh
@@ -28,8 +28,8 @@
  * Authors: Ali Saidi
  */
 
-#ifndef __ARCH_ALPHA_MMAPED_IPR_HH__
-#define __ARCH_ALPHA_MMAPED_IPR_HH__
+#ifndef __ARCH_ALPHA_MMAPPED_IPR_HH__
+#define __ARCH_ALPHA_MMAPPED_IPR_HH__
 
 /**
  * @file
@@ -60,4 +60,4 @@ handleIprWrite(ThreadContext *xc, Packet *pkt)
 
 } // namespace AlphaISA
 
-#endif // __ARCH_ALPHA_MMAPED_IPR_HH__
+#endif // __ARCH_ALPHA_MMAPPED_IPR_HH__
diff --git a/src/arch/arm/mmaped_ipr.hh b/src/arch/arm/mmapped_ipr.hh
index 8483ef7a2..0f90ac35d 100644
--- a/src/arch/arm/mmaped_ipr.hh
+++ b/src/arch/arm/mmapped_ipr.hh
@@ -30,8 +30,8 @@
  *          Stephen Hines
  */
 
-#ifndef __ARCH_ARM_MMAPED_IPR_HH__
-#define __ARCH_ARM_MMAPED_IPR_HH__
+#ifndef __ARCH_ARM_MMAPPED_IPR_HH__
+#define __ARCH_ARM_MMAPPED_IPR_HH__
 
 /**
  * @file
diff --git a/src/arch/mips/mmaped_ipr.hh b/src/arch/mips/mmapped_ipr.hh
index 99c2e7fc7..14d6e3f42 100644
--- a/src/arch/mips/mmaped_ipr.hh
+++ b/src/arch/mips/mmapped_ipr.hh
@@ -28,8 +28,8 @@
  * Authors: Ali Saidi
  */
 
-#ifndef __ARCH_MIPS_MMAPED_IPR_HH__
-#define __ARCH_MIPS_MMAPED_IPR_HH__
+#ifndef __ARCH_MIPS_MMAPPED_IPR_HH__
+#define __ARCH_MIPS_MMAPPED_IPR_HH__
 
 /**
  * @file
diff --git a/src/arch/power/mmaped_ipr.hh b/src/arch/power/mmapped_ipr.hh
index fc88634dc..a55ef8f7d 100644
--- a/src/arch/power/mmaped_ipr.hh
+++ b/src/arch/power/mmapped_ipr.hh
@@ -32,8 +32,8 @@
  *          Timothy M. Jones
  */
 
-#ifndef __ARCH_POWER_MMAPED_IPR_HH__
-#define __ARCH_POWER_MMAPED_IPR_HH__
+#ifndef __ARCH_POWER_MMAPPED_IPR_HH__
+#define __ARCH_POWER_MMAPPED_IPR_HH__
 
 /**
  * @file
@@ -63,4 +63,4 @@ handleIprWrite(ThreadContext *xc, Packet *pkt)
 
 } // namespace PowerISA
 
-#endif // __ARCH_POWER_MMAPED_IPR_HH__
+#endif // __ARCH_POWER_MMAPPED_IPR_HH__
diff --git a/src/arch/sparc/mmaped_ipr.hh b/src/arch/sparc/mmapped_ipr.hh
index 52310086e..777242e7c 100644
--- a/src/arch/sparc/mmaped_ipr.hh
+++ b/src/arch/sparc/mmapped_ipr.hh
@@ -28,8 +28,8 @@
  * Authors: Ali Saidi
  */
 
-#ifndef __ARCH_SPARC_MMAPED_IPR_HH__
-#define __ARCH_SPARC_MMAPED_IPR_HH__
+#ifndef __ARCH_SPARC_MMAPPED_IPR_HH__
+#define __ARCH_SPARC_MMAPPED_IPR_HH__
 
 /**
  * @file
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 7c7819561..8aa007168 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -816,7 +816,7 @@ handleSparcErrorRegAccess:
 regAccessOk:
 handleMmuRegAccess:
     DPRINTF(TLB, "TLB: DTB Translating MM IPR access\n");
-    req->setFlags(Request::MMAPED_IPR);
+    req->setFlags(Request::MMAPPED_IPR);
     req->setPaddr(req->getVaddr());
     return NoFault;
 };
diff --git a/src/arch/x86/mmaped_ipr.hh b/src/arch/x86/mmapped_ipr.hh
index 82fe95cef..525f54bfb 100644
--- a/src/arch/x86/mmaped_ipr.hh
+++ b/src/arch/x86/mmapped_ipr.hh
@@ -37,8 +37,8 @@
  * Authors: Gabe Black
  */
 
-#ifndef __ARCH_X86_MMAPEDIPR_HH__
-#define __ARCH_X86_MMAPEDIPR_HH__
+#ifndef __ARCH_X86_MMAPPEDIPR_HH__
+#define __ARCH_X86_MMAPPEDIPR_HH__
 
 /**
  * @file
@@ -89,4 +89,4 @@ namespace X86ISA
     }
 };
 
-#endif // __ARCH_X86_MMAPEDIPR_HH__
+#endif // __ARCH_X86_MMAPPEDIPR_HH__
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index dff62a4d7..ac32e86d7 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -179,7 +179,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
         panic("CPUID memory space not yet implemented!\n");
     } else if (prefix == IntAddrPrefixMSR) {
         vaddr = vaddr >> 3;
-        req->setFlags(Request::MMAPED_IPR);
+        req->setFlags(Request::MMAPPED_IPR);
         Addr regNum = 0;
         switch (vaddr & ~IntAddrPrefixMask) {
           case 0x10:
@@ -508,7 +508,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
         // space.
         assert(!(IOPort & ~0xFFFF));
         if (IOPort == 0xCF8 && req->getSize() == 4) {
-            req->setFlags(Request::MMAPED_IPR);
+            req->setFlags(Request::MMAPPED_IPR);
             req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
         } else if ((IOPort & ~mask(2)) == 0xCFC) {
             req->setFlags(Request::UNCACHEABLE);