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authorDavid Guillen Fandos <david.guillen@arm.com>2016-06-06 17:16:43 +0100
committerDavid Guillen Fandos <david.guillen@arm.com>2016-06-06 17:16:43 +0100
commit70798b1ba0a5b9a7242b48bf9598957476f8168b (patch)
tree5cdcb4e59a49483ac44eeda3af557fc573038034 /src/arch
parent589033c94c0381fe4e67cebe08352b6e1fbcde2e (diff)
downloadgem5-70798b1ba0a5b9a7242b48bf9598957476f8168b.tar.xz
stats: Fixing regStats function for some SimObjects
Fixing an issue with regStats not calling the parent class method for most SimObjects in Gem5. This causes issues if one adds new stats in the base class (since they are never initialized properly!). Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/tlb.cc2
-rw-r--r--src/arch/mips/tlb.cc2
-rw-r--r--src/arch/power/tlb.cc2
3 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index 3360b34c5..fcd2b518b 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -76,6 +76,8 @@ TLB::~TLB()
void
TLB::regStats()
{
+ BaseTLB::regStats();
+
fetch_hits
.name(name() + ".fetch_hits")
.desc("ITB hits");
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc
index d2aa5ad70..340c83021 100644
--- a/src/arch/mips/tlb.cc
+++ b/src/arch/mips/tlb.cc
@@ -226,6 +226,8 @@ TLB::unserialize(CheckpointIn &cp)
void
TLB::regStats()
{
+ BaseTLB::regStats();
+
read_hits
.name(name() + ".read_hits")
.desc("DTB read hits")
diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc
index edfb4f453..90a341d85 100644
--- a/src/arch/power/tlb.cc
+++ b/src/arch/power/tlb.cc
@@ -223,6 +223,8 @@ TLB::unserialize(CheckpointIn &cp)
void
TLB::regStats()
{
+ BaseTLB::regStats();
+
read_hits
.name(name() + ".read_hits")
.desc("DTB read hits")