summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-08-05 02:56:38 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-05 02:56:38 -0700
commit22a5f66820b9c2399898a7ba741ecda49a3c235d (patch)
tree3da3869a3ab82bdbb1377585bdf61c1a2c885f0c /src/arch
parentdf2c862a078e4060017b150656a473b2fb84598e (diff)
downloadgem5-22a5f66820b9c2399898a7ba741ecda49a3c235d.tar.xz
X86: Fix the carry flag for shl.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microops/regop.isa4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 698216139..ac380f34b 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -648,8 +648,10 @@ let {{
ccFlagBits = ccFlagBits & ~(ext & (CFBit | ECFBit | OFBit));
int CFBits = 0;
//Figure out if we -would- set the CF bits if requested.
- if (bits(SrcReg1, dataSize * 8 - shiftAmt))
+ if (shiftAmt <= dataSize * 8 &&
+ bits(SrcReg1, dataSize * 8 - shiftAmt)) {
CFBits = 1;
+ }
//If some combination of the CF bits need to be set, set them.
if ((ext & (CFBit | ECFBit)) && CFBits)
ccFlagBits = ccFlagBits | (ext & (CFBit | ECFBit));