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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 04:56:40 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 04:56:40 -0700
commit43f58927d693fbe18a7db2e20f540da13bc15cd3 (patch)
tree8e328e9b661da1448ce4e24783b18a63b0c961d6 /src/arch
parentb493906eb9d7674d8ae1700d07168303ec56cf02 (diff)
downloadgem5-43f58927d693fbe18a7db2e20f540da13bc15cd3.tar.xz
X86: Implement a locking version of CMPXCHG.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/semaphores.py19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/semaphores.py b/src/arch/x86/isa/insts/general_purpose/semaphores.py
index f23241863..a34e2a3c7 100644
--- a/src/arch/x86/isa/insts/general_purpose/semaphores.py
+++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py
@@ -79,6 +79,25 @@ def macroop CMPXCHG_P_R {
mov rax, rax, t1, flags=(nCZF,)
};
+def macroop CMPXCHG_LOCKED_M_R {
+ ldstl t1, seg, sib, disp
+ sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
+
+ mov t1, t1, reg, flags=(CZF,)
+ stul t1, seg, sib, disp
+ mov rax, rax, t1, flags=(nCZF,)
+};
+
+def macroop CMPXCHG_LOCKED_P_R {
+ rdip t7
+ ldstl t1, seg, riprel, disp
+ sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
+
+ mov t1, t1, reg, flags=(CZF,)
+ stul t1, seg, riprel, disp
+ mov rax, rax, t1, flags=(nCZF,)
+};
+
def macroop XADD_M_R {
ldst t1, seg, sib, disp
add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)