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authorGabe Black <gblack@eecs.umich.edu>2009-08-05 02:58:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-05 02:58:54 -0700
commit7f9a3af25014dd8f022968047a9f6f5198079a16 (patch)
treebea093b4f6e47ac7c4f6e511b143b457f942bc66 /src/arch
parent99adfd9dae5c846ebc2493fee7346aef96c96ec5 (diff)
downloadgem5-7f9a3af25014dd8f022968047a9f6f5198079a16.tar.xz
X86: Handle left rotations that go all the way around or more.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microops/regop.isa7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 5461223a3..447939abd 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -796,11 +796,12 @@ let {{
code = '''
uint8_t shiftAmt =
(op2 & ((dataSize == 8) ? mask(6) : mask(5)));
- if(shiftAmt)
+ uint8_t realShiftAmt = shiftAmt % (dataSize * 8);
+ if(realShiftAmt)
{
- uint64_t top = psrc1 << shiftAmt;
+ uint64_t top = psrc1 << realShiftAmt;
uint64_t bottom =
- bits(psrc1, dataSize * 8 - 1, dataSize * 8 - shiftAmt);
+ bits(psrc1, dataSize * 8 - 1, dataSize * 8 - realShiftAmt);
DestReg = merge(DestReg, top | bottom, dataSize);
}
else