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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:17:43 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:17:43 -0800
commitdadc30b0a4dcf50c20c9d2b33890b94323fa0394 (patch)
tree08fd5303229141dbee1d388a75b172204f87a095 /src/arch
parentfcad6e3b13410ab6c7263ce42b5e657c16f79e1d (diff)
downloadgem5-dadc30b0a4dcf50c20c9d2b33890b94323fa0394.tar.xz
X86: Make the microcode assembler recognize r8-r15.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microasm.isa3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index d1025b137..fe1d38ff1 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -138,7 +138,8 @@ let {{
# like the internal segment above
assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
- for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
+ for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
+ '8', '9', '10', '11', '12', '13', '14', '15'):
assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
for reg in range(16):